Jonghee M. Youn

Orcid: 0000-0001-7408-3804

According to our database1, Jonghee M. Youn authored at least 21 papers between 2007 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Optimizing Hardware Resource Utilization for Accelerating the NTRU-KEM Algorithm.
Comput., December, 2023

2019
A spill data aware memory assignment technique for improving power consumption of multimedia memory systems.
Multim. Tools Appl., 2019

2017
Threats of Password Pattern Leakage Using Smartwatch Motion Recognition Sensors.
Symmetry, 2017

Improving memory system performance for multimedia applications.
Multim. Tools Appl., 2017

Dynamic Analysis Bypassing Malware Detection Method Utilizing Malicious Behavior Visualization and Similarity.
Proceedings of the Advanced Multimedia and Ubiquitous Engineering, 2017

Building the De-obfuscation Platform Based on LLVM.
Proceedings of the Advances in Computer Science and Ubiquitous Computing, 2017

2016
A Study of Simple Classification of Malware Based on the Dynamic API Call Counts.
Proceedings of the Advances in Computer Science and Ubiquitous Computing, 2016

2015
A Low-Power Microcontroller with Accuracy-Controlled Event-Driven Signal Processing Unit for Rare-Event Activity-Sensing IoT Devices.
J. Sensors, 2015

Energy Consumption Reduction Technique on Smart Devices for Communication-Intensive Applications.
Proceedings of the Advances in Computer Science and Ubiquitous Computing, 2015

2013
Reducing instruction bit-width for low-power VLIW architectures.
ACM Trans. Design Autom. Electr. Syst., 2013

Dynamic code duplication with vulnerability awareness for soft error detection on VLIW architectures.
ACM Trans. Archit. Code Optim., 2013

Fast dynamic execution offloading for efficient mobile cloud computing.
Proceedings of the 2013 IEEE International Conference on Pervasive Computing and Communications, 2013

2012
Dynamic Operands Insertion for VLIW Architecture with a Reduced Bit-width Instruction Set.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012

A Delay and Distance Aware Code Mapping Technique for Coarse-Grained Reconfigurable Array Processors.
Proceedings of the Convergence and Hybrid Information Technology, 2012

2011
Fast graph-based instruction selection for multi-output instructions.
Softw. Pract. Exp., 2011

2010
Two versions of architectures for dynamic implied addressing mode.
J. Syst. Archit., 2010

Implementing dynamic implied addressing mode for multi-output instructions.
Proceedings of the 2010 International Conference on Compilers, 2010

2009
A new addressing mode for the encoding space problem on embedded processors.
Proceedings of the IEEE 7th Symposium on Application Specific Processors, 2009

Orthogonal Instruction Encoding for a 16-bit Embedded Processor with Dynamic Implied Addressing Mode.
Proceedings of the 11th IEEE International Conference on High Performance Computing and Communications, 2009

Iterative Algorithm for Compound Instruction Selection with Register Coalescing.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2007
A code-generator generator for multi-output instructions.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007


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