Yoshichika Fujioka

According to our database, Yoshichika Fujioka authored at least 10 papers between 1993 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

Design of a Logic-in-Memory Multiple-Valued Reconfigurable VLSI Based on a Bit-Serial Packet Data Transfer Scheme.

Shintaro Harada, Xu Bai, Michitaka Kameyama, Yoshichika Fujioka

Proceedings of the IEEE 44th International Symposium on Multiple-Valued Logic, 2014

2012

Configuration memory size reduction of a Dynamically Reconfigurable Processor based on a register-transfer-level packet data transfer scheme.

Yoshichika Fujioka, Michitaka Kameyama

Proceedings of the International SoC Design Conference, 2012

2009

Traveling-salesman game with multiple competitors/cooperators and simultaneous move search algorithm.

Nobuhiro Tomabechi, Yoshichika Fujioka

Proceedings of the 2009 International IEEE Consumer Electronics Society's Games Innovations Conference, 2009

2005

VLSI architecture based on packet data transfer scheme and its application.

Yuya Homma, Michitaka Kameyama, Yoshichika Fujioka, Nobuhiro Tomabechi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2000

Design of a WSI scale parallel processor for intelligent robot control based on a dynamic reconfiguration of multi-operand arithmetic units.

Yoshichika Fujioka, Nobuhiro Tomabechi

Syst. Comput. Jpn., 2000

1999

Design of a reconfigurable VLSI processor for robot control based on bit-serial architecture.

Yoshichika Fujioka, Michitaka Kameyama

Syst. Comput. Jpn., 1999

1996

VLSI Processor System for Robotics.

Michitaka Kameyama, Yoshichika Fujioka

J. Robotics Mechatronics, 1996

Design of a Parallel Processor for Visual Feedback Control Based on the Reconfiguration of Word Length.

Yoshichika Fujioka, Nobuhiro Tomabechi

J. Robotics Mechatronics, 1996

1994

Coordinate Transformation VLSI Processor for Redundant Manipulator Control.

Yoshichika Fujioka, Michitaka Kameyama, Tatsuo Higuchi

J. Robotics Mechatronics, 1994

1993

2400-MFLOPS Reconfigurable Parallel VLSI Processor for Robot Control.

Yoshichika Fujioka, Michitaka Kameyama

Proceedings of the 1993 IEEE International Conference on Robotics and Automation, 1993