Yoshinori Yamaguchi

According to our database1, Yoshinori Yamaguchi authored at least 46 papers between 1983 and 2010.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2010
Packrat parsers can handle practical grammars in mostly constant space.
Proceedings of the 9th ACM SIGPLAN-SIGSOFT Workshop on Program Analysis for Software Tools and Engineering, 2010

2007
FPGA-Based Intrusion Detection System for 10 Gigabit Ethernet.
IEICE Trans. Inf. Syst., 2007

2006
Proposal of recordable pointer: Pointed position measurement by projecting interference concentric circle pattern with a pointing device.
Proceedings of the 18th International Conference on Pattern Recognition (ICPR 2006), 2006

A Method of Generating Highly Efficient String Matching Circuit for Intrusion Detection.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Highly Efficient String Matching Circuit for IDS with FPGA.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

2002
New range finder based on the re-encoding method and its application to 3D object modeling.
Proceedings of the Conference on Three-Dimensional Image Capture and Applications V, 2002

2001
Tolerating Communication Latency through Dynamic Thread Invocation in a Multithreaded Architecture.
Proceedings of the Compiler Optimizations for Scalable Parallel Systems Languages, 2001

1999
Communication Studies of Single-Threaded and Multithreaded Distributed-Memory Multiprocessors.
Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

1998
Fast Speculative Search Engine on the Highly Parallel Computer EM-X.
Proceedings of the SIGIR '98: Proceedings of the 21st Annual International ACM SIGIR Conference on Research and Development in Information Retrieval, 1998

Highly Efficient Implementation of MPI Point-to-Point Communication Using Remote Memory Operations.
Proceedings of the 12th international conference on Supercomputing, 1998

1997
Fine-Grain Multithreading with the EM-X Multiprocessor.
Proceedings of the 9th Annual ACM Symposium on Parallel Algorithms and Architectures, 1997

CODA-R: a reconfigurable testbed for real-time parallel computation.
Proceedings of the 4th International Workshop on Real-Time Computing Systems and Applications (RTCSA '97), 1997

Experience with Fine-Grain Communication in EM-X Multiprocessor for Parallel Sparse Matrix Computation.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

Parallel Execution of Radix Sort Program Using Fine-Grain Communication.
Proceedings of the 1997 Conference on Parallel Architectures and Compilation Techniques (PACT '97), 1997

1996
Identifying the capability of overlapping computation with communication.
Proceedings of the Fifth International Conference on Parallel Architectures and Compilation Techniques, 1996

1995
Performance comparison of real-time architectures using simulation.
Proceedings of the 2nd International Workshop on Real-Time Computing Systems and Applications, October 25, 1995

The EM-X Parallel Computer: Architecture and Basic Performance.
Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995

A Macrotask-level Unlimited Speculative Execution on Multiprocessors.
Proceedings of the 9th international conference on Supercomputing, 1995

1994
Programming with Distributed Data Structure for EM-X Multiprocessor.
Proceedings of the Theory and Practice of Parallel Programming, 1994

Parallel bidirectional heuristic search on the EM-4 multiprocessor.
Proceedings of the Sixth IEEE Symposium on Parallel and Distributed Processing, 1994

Nonnumeric search results on the EM-4 distributed-memory multiprocessor.
Proceedings of the Proceedings Supercomputing '94, 1994

A Priority Forwarding Router Chip for Real-Time Interconnection Networks.
Proceedings of the 15th IEEE Real-Time Systems Symposium (RTSS '94), 1994

Message-based efficient remote memory access on a highly parallel computer EM-X.
Proceedings of the International Symposium on Parallel Architectures, 1994

Experience with Executing Shared Memory Programs using Fine-Grain Communication and Multithreading in EM-4.
Proceedings of the 8th International Symposium on Parallel Processing, 1994

EM-C: Programming with Explicit Parallelism and Locality for EM-4 Multiprocessor.
Proceedings of the Parallel Architectures and Compilation Techniques, 1994

The Execution Model and the Architecture for Real-Time Parallel Systems.
Proceedings of the Technology and Foundations - Information Processing '94, Volume 1, Proceedings of the IFIP 13th World Computer Congress, Hamburg, Germany, 28 August, 1994

1993
Evaluation of parallel execution performance by highly parallel computer EM-4.
Syst. Comput. Jpn., 1993

Design and Implementation of a Circular Omega Network in the EM-4.
Parallel Comput., 1993

The Hardware Architecture of the CODA Real-Time Parallel Processor.
Proceedings of the Parallel Computing: Trends and Applications, 1993

EMC-Y: Parallel Processing Element Optimizing Communication and Computation.
Proceedings of the 7th international conference on Supercomputing, 1993

1992
Methodologies in development and testing of the dataflow machine EM-4.
Parallel Comput., 1992

A prototype of a highly parallel dataflow machine EM-4 and its preliminary evaluation.
Future Gener. Comput. Syst., 1992

Thread-based Programming for the EM-4 Hybrid Dataflow Machine.
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992

Evaluation of the EM-4 Highly Parallel Computer using a Game Tree Searching Problem.
Proceedings of the International Conference on Fifth Generation Computer Systems. FGCS 1992, 1992

1991
Load balancing by function distribution on the EM-4 prototype.
Proceedings of the Proceedings Supercomputing '91, 1991

Prototype Implementation of a Highly Parallel Dataflow Machine EM-4.
Proceedings of the Fifth International Parallel Processing Symposium, Proceedings, Anaheim, California, USA, April 30, 1991

Design and Implementation of a Versatile Interconnection Network in the EM-4.
Proceedings of the International Conference on Parallel Processing, 1991

1990
Evaluation of a Data-Driven Machine with Advanced Control Mechanism.
Syst. Comput. Jpn., 1990

Dataflow computer development in Japan.
Proceedings of the 4th international conference on Supercomputing, 1990

1989
An Architecture of a Dataflow Single Chip Processor.
Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989

An Architectural Disgn of a Highly Parallel Dataflow Machine.
Proceedings of the Information Processing 89, Proceedings of the IFIP 11th World Computer Congress, San Francisco, USA, August 28, 1989

1988
Dataflow Computing Models, Languages, and Machines for Intelligence Computations.
IEEE Trans. Software Eng., 1988

1986
DBCL: Data-Flow Computing Base Language with n-Value Logic.
Proceedings of the Fall Joint Computer Conference, November 2-6, 1986, Dallas, Texas, USA, 1986

1984
EM-3: A Lisp-Based Data-Driven Machine.
Proceedings of the International Conference on Fifth Generation Computer Systems, 1984

1983
A Control Mechanism of a Lisp-Based Data-Driven Machine.
Inf. Process. Lett., 1983

A Performance Evaluation of a Lisp-Based Data-Driven Machine (EM-3)
Proceedings of the 10th Annual Symposium on Computer Architecture, 1983, 1983


  Loading...