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Yu He

Orcid: 0009-0004-6053-5370

Affiliations:
  • Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China


According to our database1, Yu He authored at least 3 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
A 6.3-to-14.1-GHz low-jitter fractional-N PLL utilizing a glitch-free bidirectional phase switch with a dedicated DSM.
[BibTeX]
[DOI]
Jiamin Li
,
Yu He
,
Sai Li
,
Zedong Wang
,
He Sun
,
Hua Xu
,
Xuqiang Zheng
Microelectron. J., 2026

2025
A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Utilizing a Complementary-Injection Scheme and an Adaptive Pulsewidth Adjustment.
[BibTeX]
[DOI]
Zedong Wang
,
Xuqiang Zheng
,
Yu He
,
Hua Xu
,
Sai Li
,
Zunsong Yang
,
Fangxu Lv
,
Mingche Lai
,
Xinyu Liu
IEEE J. Solid State Circuits, March, 2025

2024
An Injection-Locked Clock Multiplier with Adaptive Pulsewidth Adjustment and Phase Error Cancellation Achieving 43.9fs RMS Jitter and -255.5dB FoM.
[BibTeX]
[DOI]
Yu He
,
Xuqiang Zhenq
,
Zedong Wang
,
Zunsong Yanq
,
Hua Xu
,
Fangxu Lv
,
Mingche Lai
,
Xinyu Liu
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024


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