Yue Xing

Orcid: 0000-0001-7422-3352

Affiliations:

Princeton University, Department of Electrical Engineering, NJ, USA
Tsinghua University, Department of Electronic Engineering, TNList, Beijing, China (former)

According to our database¹, Yue Xing authored at least 7 papers between 2016 and 2023.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

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Bibliography

2023

SoC Protocol Implementation Verification Using Instruction-Level Abstraction Specifications.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., November, 2023

2022

Compositional Verification Using a Formal Component and Interface Specification.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Generalizing Tandem Simulation: Connecting High-level and RTL Simulation Models.

[BibT_eX]

[DOI]

Yue Xing

Aarti Gupta

Sharad Malik

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021

Leveraging Processor Modeling and Verification for General Hardware Modules.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2018

A formal instruction-level GPU model for scalable verification.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2018

2017

Multistage Latency Adders Architecture Employing Approximate Computing.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2017

2016

Approximate Adder with Hybrid Prediction and Error Compensation Technique.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Yue Xing

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