Yukio Ootaguro

According to our database, Yukio Ootaguro authored at least 3 papers between 1996 and 2001.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2001

Utilizing surplus timing for power reduction.

Mototsugu Hamada, Yukio Ootaguro, Tadahiro Kuroda

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000

300MHz design methodology of VU for emotion synthesis.

Takayuki Kamei, Hideaki Takeda, Yukio Ootaguro, Takayoshi Shimazawa, Kazuhiko Tachibana, Shin'ichi Kawakami, Seiji Norimatsu, Fujio Ishihara, Toshinori Sato, Hiroaki Murakami, Nobuhiro Ide, Yukio Endo, Akira Aono, Atsushi Kunimatsu

Proceedings of ASP-DAC 2000, 2000

1996

A multiplier-accumulator macro for a 45 MIPS embedded RISC processor.

Hiroalti Murakami, Naoka Yano, Yukio Ootaguro, Yukio Sugeno, Maki Ueno, Yukinori Muroya, Tsuneo Aramaki

IEEE J. Solid State Circuits, 1996