Takayuki Kamei

According to our database, Takayuki Kamei authored at least 9 papers between 1997 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2012

Predicting missing links in social networks with hierarchical dirichlet processes.

Takayuki Kamei, Keiko Ono, Masahito Kumano, Masahiro Kimura

Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN), 2012

2003

A single-chip MPEG-2 codec based on customizable media embedded processor.

Shunichi Ishiwata, Tomoo Yamakage, Yoshiro Tsuboi, Takayoshi Shimazawa, Tomoko Kitazawa, Shuji Michinaka, Kunihiko Yahagi, Hideki Takeda, Akihiro Oue, Tomoya Kodama, Nobu Matsumoto, Takayuki Kamei, Mitsuo Saito, Takashi Miyamori, Goichi Ootomo, Masataka Matsui

IEEE J. Solid State Circuits, 2003

2002

A single-chip MPEG-2 codec based on customizable media microprocessor.

Shunichi Ishiwata, Tomoo Yamakage, Yoshiro Tsuboi, Takayoshi Shimazawa, Tomoko Kitazawa, Shuji Michinaka, Kunihiko Yahagi, Hideki Takeda, Akihiro Oue, Tomoya Kodama, Nobu Matsumoto, Takayuki Kamei, Takashi Miyamori, Goichi Ootomo, Masataka Matsui

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2000

Vector Unit Architecture for Emotion Synthesis.

Atsushi Kunimatsu, Nobuhiro Ide, Toshinori Sato, Yukio Endo, Hiroaki Murakami, Takayuki Kamei, Masashi Hirano, Fujio Ishihara, Haruyuki Tago, Masaaki Oka, Akio Ohba, Teiji Yutaka, Toyoshi Okada, Masakazu Suzuoki

IEEE Micro, 2000

2.44-GFLOPS 300-MHz floating-point vector-processing unit for high-performance 3D graphics computing.

Nobuhiro Ide, Masashi Hirano, Yukio Endo, Shin-ichi Yoshioka, Hiroaki Murakami, Atsushi Kunimatsu, Toshinori Sato, Takayuki Kamei, Toyoshi Okada, Masakazu Suzuoki

IEEE J. Solid State Circuits, 2000

300MHz design methodology of VU for emotion synthesis.

Takayuki Kamei, Hideaki Takeda, Yukio Ootaguro, Takayoshi Shimazawa, Kazuhiko Tachibana, Shin'ichi Kawakami, Seiji Norimatsu, Fujio Ishihara, Toshinori Sato, Hiroaki Murakami, Nobuhiro Ide, Yukio Endo, Akira Aono, Atsushi Kunimatsu

Proceedings of ASP-DAC 2000, 2000

1999

Performance evaluation of SNAIL: A multiprocessor based on the simple serial synchronized multistage interconnection network architecture.

Junji Yamamoto, Takashi Fujiwara, T. Komeda, Takayuki Kamei, Toshihiro Hanawa, Hideharu Amano

Parallel Comput., 1999

1998

The MINC (Multistage Interconnection Network with Cache Control Mechanism) Chip.

Takashi Midorikawa, Takayuki Kamei, Toshihiro Hanawa, Hideharu Amano

Proceedings of the ASP-DAC '98, 1998

1997

An LSI implementation of the simple serial synchronized multistage interconnection network.

Takayuki Kamei, Masashi Sasahara, Hideharu Amano

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997