Yun-Cheng Jao

According to our database, Yun-Cheng Jao authored at least 4 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2026

Unbalanced MMPD for CDR in Multi-PAM High-Speed Wireline Applications.

Chun-Chang Lu, Ping-Hsuan Hsieh, Yen-Po Lin, Yun-Cheng Jao, Wu-Hung Hsieh, Pen-Jui Peng

IEEE Trans. Circuits Syst. I Regul. Pap., May, 2026

A 2.16-pJ/b 112-Gb/s PAM-4 Transceiver With Time-Interleaved 2-b/3-b ADCs and Unbalanced Baud-Rate CDR for XSR Applications in 28-nm CMOS.

Yen-Po Lin, Pen-Jui Peng, Chun-Chang Lu, Po-Ting Shen, Yun-Cheng Jao, Ping-Hsuan Hsieh

IEEE J. Solid State Circuits, February, 2026

2025

7.6 A 2.06pJ/b 106.25Gb/s PAM-4 Receiver with 3-Tap FFE and 1-Tap Speculative DFE in 28nm CMOS.

Yen-Po Lin, Yun-Cheng Jao, Wu-Hung Hsieh, Pen-Jui Peng

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2024

7.7 A 2.16pJ/b 112Gb/s PAM-4 Transceiver with Time-Interleaved 2b/3b ADCs and Unbalanced Baud-Rate CDR for XSR Applications in 28nm CMOS.

Yen-Po Lin, Pen-Jui Peng, Chun-Chang Lu, Po-Ting Shen, Yun-Cheng Jao, Ping-Hsuan Hsieh

Proceedings of the IEEE International Solid-State Circuits Conference, 2024