Yusuke Jyouno

According to our database, Yusuke Jyouno authored at least 4 papers between 1995 and 1998.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

1998

Internal voltage generator for low voltage, quarter-micrometer flash memories.

Takayuki Kawahara, Syun-ichi Saeki, Yusuke Jyouno, Naoki Miyamoto, Takashi Kobayashi, Katsutaka Kimura

IEEE J. Solid State Circuits, 1998

20-Mb/s erase/record flash memory by asymmetrical operation.

Takayuki Kawahara, Yusuke Jyouno, Syun-ichi Saeki, Naoki Miyamoto, Katsutaka Kimura

IEEE J. Solid State Circuits, 1998

1996

Bit-line clamped sensing multiplex and accurate high voltage generator for quarter-micron flash memories.

Takayuki Kawahara, Takashi Kobayashi, Yusuke Jyouno, Syun-ichi Saeki, Naoki Miyamoto, T. Adachi, Masataka Kato, Akihiko Sato, J. Yugami, Hitoshi Kume, Katsutaka Kimura

IEEE J. Solid State Circuits, 1996

1995

High reliability electron-ejection method for high density flash memories.

Takayuki Kawahara, Naoki Miyamoto, Syun-ichi Saeki, Yusuke Jyouno, Masataka Kato, Katsutaka Kimura

IEEE J. Solid State Circuits, December, 1995