Yusuke Okaniwa

According to our database1, Yusuke Okaniwa authored at least 3 papers between 2005 and 2007.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2007
A 40-44 Gb/s 3 × Oversampling CMOS CDR/1: 16 DEMUX.
IEEE J. Solid State Circuits, 2007

A 40-to-44Gb/s 3�? Oversampling CMOS CDR/1: 16 DEMUX.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2005
A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique.
IEEE J. Solid State Circuits, 2005


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