Zhen Wang

Affiliations:
  • Boston University, Reliable Computing Laboratory, MA, USA


According to our database1, Zhen Wang authored at least 21 papers between 2008 and 2016.

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Bibliography

2016
Design of Reliable and Secure Devices Realizing Shamir's Secret Sharing.
IEEE Trans. Computers, 2016

2015
New byte error correcting codes with simple decoding for reliable cache design.
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

2014
Design of Strongly Secure Communication and Computation Channels by Nonlinear Error Detecting Codes.
IEEE Trans. Computers, 2014

Hardware Implementation of Secure Shamir's Secret Sharing Scheme.
IACR Cryptol. ePrint Arch., 2014

2013
Secure memories resistant to both random errors and fault injection attacks using nonlinear error correction codes.
Proceedings of the HASP 2013, 2013

2012
Design of Cryptographic Devices Resilient to Fault Injection Attacks Using Nonlinear Robust Codes.
Proceedings of the Fault Analysis in Cryptography, 2012

Nonlinear Multi-Error Correction Codes for Reliable MLC nand Flash Memories.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Secure Multipliers Resilient to Strong Fault-Injection Attacks Using Multilinear Arithmetic Codes.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Reliable and secure memories based on algebraic manipulation correction codes.
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

2011
Algebraic manipulation detection codes and their applications for design of secure cryptographic devices.
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

Influence of metallic tubes on the reliability of CNTFET SRAMs: error mechanisms and countermeasures.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

2010
Design of Memories with Concurrent Error Detection and Correction by Nonlinear SEC-DED Codes.
J. Electron. Test., 2010

Robust FSMs for cryptographic devices resilient to strong fault injection attacks.
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

Reliable MLC NAND flash memories based on nonlinear t-error-correcting codes.
Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, 2010

2009
Multilinear codes for robust error detection.
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

Design of Reliable and Secure Multipliers by Multilinear Arithmetic Codes.
Proceedings of the Information and Communications Security, 11th International Conference, 2009

Accelerating multi-party scheduling for transaction-level modeling.
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

Replacing linear Hamming codes by robust nonlinear codes results in a reliability improvement of memories.
Proceedings of the 2009 IEEE/IFIP International Conference on Dependable Systems and Networks, 2009

2008
Asynchronous balanced gates tolerant to interconnect variability.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Comparative Analysis of Robust Fault Attack Resistant Architectures for Public and Private Cryptosystems.
Proceedings of the Fifth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2008

Power Balanced Gates Insensitive to Routing Capacitance Mismatch.
Proceedings of the Design, Automation and Test in Europe, 2008


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