Zhican Wang

According to our database, Zhican Wang authored at least 9 papers between 2021 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

SD-Acc: Accelerating Stable Diffusion through Phase-aware Sampling and Hardware Co-Optimizations.

Zhican Wang, Guanghui He, Hongxiang Fan

CoRR, July, 2025

VEDA: Efficient LLM Generation Through Voting-based KV Cache Eviction and Dataflow-flexible Accelerator.

Zhican Wang, Hongxiang Fan, Haroon Waris, Gang Wang, Zhenyu Li, Jianfei Jiang, Yanan Sun, Guanghui He

CoRR, July, 2025

DESA: Dataflow Efficient Systolic Array for Acceleration of Transformers.

Zhican Wang, Hongxiang Fan, Guanghui He

IEEE Trans. Computers, June, 2025

Accelerating 3D Gaussian Splatting with Neural Sorting and Axis-Oriented Rasterization.

Zhican Wang, Guanghui He, Dantong Liu, Lingjun Gao, Shell Xu Hu, Chen Zhang, Zhuoran Song, Nicholas D. Lane, Wayne Luk, Hongxiang Fan

CoRR, June, 2025

COSA Plus: Enhanced Co-Operative Systolic Arrays for Attention Mechanism in Transformers.

Zhican Wang, Gang Wang, Guanghui He

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2025

Exploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysis.

Jiahao Gai, Hao Chen, Zhican Wang, Hongyu Zhou, Wanru Zhao, Nicholas D. Lane, Hongxiang Fan

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024

DEFA: Efficient Deformable Attention Acceleration via Pruning-Assisted Grid-Sampling and Multi-Scale Parallel Processing.

Yansong Xu, Dongxu Lyu, Zhenyu Li, Yuzhou Chen, Zilong Wang, Gang Wang, Zhican Wang, Haomin Li, Guanghui He

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

COSA:Co-Operative Systolic Arrays for Multi-head Attention Mechanism in Neural Network using Hybrid Data Reuse and Fusion Methodologies.

Zhican Wang, Gang Wang, Honglan Jiang, Ningyi Xu, Guanghui He

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2021

An Energy Efficient Accelerator for Bidirectional Recurrent Neural Networks (BiRNNs) Using Hybrid-Iterative Compression With Error Sensitivity.

Guocai Nan, Zhengkuan Wang, Chenghua Wang, Bi Wu, Zhican Wang, Weiqiang Liu, Fabrizio Lombardi

IEEE Trans. Circuits Syst. I Regul. Pap., 2021