Ziaul Choudhury

According to our database, Ziaul Choudhury authored at least 9 papers between 2016 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

FlowPix: Accelerating Image Processing Pipelines on an FPGA Overlay using a Domain Specific Compiler.

Ziaul Choudhury, Anish Gulati, Suresh Purini

ACM Trans. Archit. Code Optim., December, 2023

2022

A Unified Programmable Edge Matrix Processor for Deep Neural Networks and Matrix Algebra.

Biji George, Om Ji Omer, Ziaul Choudhury, Anoop V, Sreenivas Subramoney

ACM Trans. Embed. Comput. Syst., September, 2022

An FPGA Overlay for CNN Inference with Fine-grained Flexible Parallelism.

Ziaul Choudhury, Shashwat Shrivastava, Lavanya Ramapantulu, Suresh Purini

ACM Trans. Archit. Code Optim., 2022

Accuracy Configurable FPGA Implementation of Harris Corner Detection.

Shivani Maurya, Ziaul Choudhury, Suresh Purini

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2020

FPGA Accelerator for Stereo Vision using Semi-Global Matching through Dependency Relaxation.

Shashwat Shrivastava, Ziaul Choudhury, Shashwat Khandelwal, Suresh Purini

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Accelerating Local Laplacian Filters on FPGAs.

Shashwat Khandelwal, Ziaul Choudhury, Shashwat Shrivastava, Suresh Purini

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Bitwidth customization in image processing pipelines using interval analysis and SMT solvers.

Suresh Purini, Vinamra Benara, Ziaul Choudhury, Uday Bondhugula

Proceedings of the CC '20: 29th International Conference on Compiler Construction, 2020

2018

Synthesizing Power and Area Efficient Image Processing Pipelines on FPGAs using Customized Bit-widths.

Vinamra Benara, Sahithi Rampalli, Ziaul Choudhury, Suresh Purini, Uday Bondhugula

CoRR, 2018

2016

A Hybrid CPU+GPU Working-Set Dictionary.

Ziaul Choudhury, Suresh Purini, Shiva Rama Krishna

Proceedings of the 15th International Symposium on Parallel and Distributed Computing, 2016