Adi Yoaz

According to our database1, Adi Yoaz authored at least 13 papers between 1996 and 2022.

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Bibliography

2022
Intel Alder Lake CPU Architectures.
IEEE Micro, 2022

2020
Auto-Predication of Critical Branches.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

Focused Value Prediction.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2019
Towards the adoption of Local Branch Predictors in Modern Out-of-Order Superscalar Processors.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

2017
Inside 6th-Generation Intel Core: New Microarchitecture Code-Named Skylake.
IEEE Micro, 2017

2002
Microarchitectural support for precomputation microthreads.
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

Difficult-Path Branch Prediction Using Subordinate Microthreads.
Proceedings of the 29th International Symposium on Computer Architecture (ISCA 2002), 2002

2000
Early load address resolution via register tracking.
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

eXtended Block Cache.
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000

1999
Speculation Techniques for Improving Load Related Instruction Scheduling.
Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

Correlated Load-Address Predictors.
Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

1998
A Novel Renaming Scheme to Exploit Value Temporal Locality Through Physical Register Reuse and Unification.
Proceedings of the 31st Annual IEEE/ACM International Symposium on Microarchitecture, 1998

1996
Tango: A Hardware-Based Data Prefetching Technique for Superscalar Processors.
Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, 1996


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