Yale N. Patt
Affiliations:- University of Texas at Austin, USA
According to our database1,
Yale N. Patt
authored at least 199 papers
between 1967 and 2024.
Collaborative distances:
Collaborative distances:
Awards
ACM Fellow
ACM Fellow 2001, "For many outstanding seminal contributions to high performance microarchitecture and for leadership and teaching in computer science and engineering education.".
IEEE Fellow
IEEE Fellow 1992, "For innovative contributions to high-speed computer architecture.".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on zbmath.org
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on fi.edu
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on viaf.org
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on id.loc.gov
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on d-nb.info
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on isni.org
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on dl.acm.org
On csauthors.net:
Bibliography
2024
2022
SafeGuard: Reducing the Security Risk from Row-Hammer via Low-Cost Integrity Protection.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022
2021
Branch Runahead: An Alternative to Branch Prediction for Impossible to Predict Branches.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
2020
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
2018
Duplicon Cache: Mitigating Off-Chip Memory Bank and Bank Group Conflicts Via Data Duplication.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
2016
Common Bonds: MIPS, HPS, Two-Level Branch Prediction, and Compressed Code RISC Processor.
IEEE Micro, 2016
Continuous runahead: Transparent hardware acceleration for memory intensive workloads.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016
Greater Performance and Better Efficiency: Predicated Execution has shown us the way.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016
2015
Proceedings of the 48th International Symposium on Microarchitecture, 2015
2014
Author retrospective for increasing the instruction fetch rate via multiple branch prediction and a branch address cache.
Proceedings of the ACM International Conference on Supercomputing 25th Anniversary Volume, 2014
2013
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013
2012
Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multicore Memory Systems.
ACM Trans. Comput. Syst., 2012
Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012
MorphCore: An Energy-Efficient Microarchitecture for High Performance ILP and High Throughput TLP.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012
High performance supercomputers: should the individual processor be more than a brick?
Proceedings of the International Conference on Supercomputing, 2012
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012
2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011
2010
IEEE Micro, 2010
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010
Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems.
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010
2009
Virtual Program Counter (VPC) Prediction: Very Low Cost Indirect Branch Prediction Using Conditional Branch Prediction Hardware.
IEEE Trans. Computers, 2009
Proceedings of the Embedded Computer Systems: Architectures, 2009
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009
Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009
Techniques for bandwidth-efficient prefetching of linked data structures in hybrid prefetching systems.
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009
Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, 2009
Proceedings of the Architecture of Computing Systems, 2009
2008
IEEE Micro, 2008
Proceedings of the Embedded Computer Systems: Architectures, 2008
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008
Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008
Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008
Feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on CMPs.
Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems, 2008
Improving the performance of object-oriented languages with dynamic predication of indirect jumps.
Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems, 2008
2007
IEEE Micro, 2007
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007
VPC prediction: reducing the cost of indirect branches via hardware-based dynamic devirtualization.
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007
Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers.
Proceedings of the 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 2007
Line Distillation: Increasing Cache Capacity by Filtering Unused Words in Cache Lines.
Proceedings of the 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 2007
Proceedings of the High Performance Computing, 2007
Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors.
Proceedings of the Fifth International Symposium on Code Generation and Optimization (CGO 2007), 2007
2006
Address-Value Delta (AVD) Prediction: A Hardware Technique for Efficiently Parallelizing Dependent Cache Misses.
IEEE Trans. Computers, 2006
IEEE Micro, 2006
IEEE Micro, 2006
Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006
Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006
Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006
Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006
Proceedings of the Fourth IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2006), 2006
2005
An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors.
IEEE Trans. Computers, 2005
Using the First-Level Caches as Filters to Reduce the Pollution Caused by Speculative Memory References.
Int. J. Parallel Program., 2005
On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor.
IEEE Comput. Archit. Lett., 2005
Address-Value Delta (AVD) Prediction: Increasing the Effectiveness of Runahead Execution by Exploiting Regular Memory Allocation Patterns.
Proceedings of the 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 2005
Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution.
Proceedings of the 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 2005
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005
A Unifying Theory of Distributed Processing (Or, The Chutzpah One Should Expect When You Invite a Microarchitect into Your Sandbox).
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005
Microarchitecture-Based Introspection: A Technique for Transient-Fault Tolerance in Microprocessors.
Proceedings of the 2005 International Conference on Dependable Systems and Networks (DSN 2005), 28 June, 2005
The microprocessor of the year 2014: do Pentium 4, Pentium M, and Power 5 provide any hints?
Proceedings of the 2005 ACS / IEEE International Conference on Computer Systems and Applications (AICCSA 2005), 2005
2004
Proceedings of the 3rd Workshop on Memory Performance Issues, 2004
Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance.
Proceedings of the 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2004), 2004
Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery.
Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004
Proceedings of the 2004 IEEE International Symposium on Performance Analysis of Systems and Software, 2004
Proceedings of the 2004 IEEE International Symposium on Performance Analysis of Systems and Software, 2004
Introduction to computing systems - from bits and gates to C and beyond (2. ed.).
McGraw-Hill, ISBN: 978-0-07-246750-5, 2004
2003
IEEE Micro, 2003
Teaching and teaching computer architecture: two very different topics: (some opinions about each).
Proceedings of the 2003 workshop on Computer architecture education, 2003
Proceedings of the 17th Annual International Conference on Supercomputing, 2003
Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-Order Processors.
Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003
The High Performance Microprocessor in the Year 2013: What Will It Look Like? What It Won't Look Like?
Proceedings of the High Performance Computing - HiPC 2003, 10th International Conference, 2003
2002
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002
Proceedings of the 29th International Symposium on Computer Architecture (ISCA 2002), 2002
Using Internal Redundant Representations and Limited Bypass to Support Pipelined Adders and Register Files.
Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002
Handling of packet dependencies: a critical issue for highly parallel network processors.
Proceedings of the International Conference on Compilers, 2002
2001
Proc. IEEE, 2001
Proceedings of the 32rd SIGCSE Technical Symposium on Computer Science Education, 2001
Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001
2000
ACM Trans. Comput. Syst., 2000
Proceedings of the 33rd Annual IEEE/ACM International Symposium on Microarchitecture, 2000
Higher and Higher Performance Microprocessors: Are The Problems Just Too Hard To Solve?
Proceedings of the 26th EUROMICRO 2000 Conference, 2000
1999
IEEE Trans. Computers, 1999
Proceedings of the 1999 workshop on Computer architecture education, 1999
Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999
1998
IEEE Trans. Computers, 1998
Increasing the Instruction Fetch Rate via Block-Structured Instruction Set Architectures.
Int. J. Parallel Program., 1998
Putting the Fill Unit to Work: Dynamic Optimizations for Trace Cache Microprocessors.
Proceedings of the 31st Annual IEEE/ACM International Symposium on Microarchitecture, 1998
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998
Retrospective: Alternative Implementations of Two-Level Adaptive Training Branch Prediction.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998
Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998
HPSm, a High Performance Restricted Data Flow Architecture Having Minimal Functionality.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998
Retrospective: HPSm, a High Performance Restricted Data Flow Architecture Having Minimal Functionality.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998
An Analysis of Correlation and Predictability: What Makes Two-Level Branch Predictors Work.
Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998
Proceedings of the ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, 1998
1997
Recovery requirements of branch prediction storage structures in the presence of mispredicted-path execution.
Int. J. Parallel Program., 1997
Int. J. Parallel Program., 1997
Reducing the Performance Impact of Instruction Cache Misses by Writing Instructions into the Reservation Stations Out-of-Order.
Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997
Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997
Proceedings of the 24th International Symposium on Computer Architecture, 1997
Proceedings of the 24th International Symposium on Computer Architecture, 1997
Proceedings of the Digest of Papers: FTCS-27, 1997
1996
Int. J. Parallel Program., 1996
Using Predicated Execution to Improve the Performance of a Dynamically Scheduled Machine with Speculative Execution.
Int. J. Parallel Program., 1996
Education in computer science and computer engineering starts with computer architecture.
Proceedings of the 1996 workshop on Computer architecture education, 1996
Using Hybrid Branch Predictors to Improve Branch Prediction Accuracy in the Presence of Context Switches.
Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996
Proceedings of the Fifth International Conference on Parallel Architectures and Compilation Techniques, 1996
1995
Int. J. Parallel Program., 1995
Proceedings of the 1995 Workshop on Computer Architecture Education, 1995
Proceedings of the 1995 Workshop on Computer Architecture Education, 1995
Proceedings of the 1995 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems, 1995
Proceedings of the 28th Annual International Symposium on Microarchitecture, Ann Arbor, Michigan, USA, November 29, 1995
Track Piggybacking: An Improved Rebuild Algorithm for RAID5 Disk Arrays.
Proceedings of the 1995 International Conference on Parallel Processing, 1995
1994
Computer, 1994
Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1994
Proceedings of the First USENIX Symposium on Operating Systems Design and Implementation (OSDI), 1994
Facilitating superscalar processing via a combined static/dynamic register renaming scheme.
Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30, 1994
The effect of speculatively updating branch history on branch prediction accuracy, revisited.
Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30, 1994
1993
Proceedings of the 1993 ACM SIGMOD International Conference on Management of Data, 1993
Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1993
Branch history table indexing to prevent pipeline bubbles in wide-issue superscalar processors.
Proceedings of the 26th Annual International Symposium on Microarchitecture, 1993
Proceedings of the 26th Annual International Symposium on Microarchitecture, 1993
Proceedings of the 20th Annual International Symposium on Computer Architecture, 1993
Increasing the Instruction Fetch Rate via Multiple Branch Prediction and a Branch Address Cache.
Proceedings of the 7th international conference on Supercomputing, 1993
Proceedings of the Second International Symposium on High Performance Distributed Computing, 1993
1992
Report of the Purdue Workshop on Grand Challenges in Computer Architecture for the Support of High Performance Computing.
J. Parallel Distributed Comput., 1992
A comprehensive instruction fetch mechanism for a processor supporting speculative execution.
Proceedings of the 25th Annual International Symposium on Microarchitecture, 1992
Proceedings of the 25th Annual International Symposium on Microarchitecture, 1992
1991
Experimental Research in Computer Architecture - Guest Editor's Introduction to the Special Issue.
Computer, 1991
Proceedings of the 24th Annual IEEE/ACM International Symposium on Microarchitecture, 1991
The Effect of Real Data Cache Behavior on the Performance of a Microarchitecture that Supports Dynamic Scheduling.
Proceedings of the 24th Annual IEEE/ACM International Symposium on Microarchitecture, 1991
Exploiting Fine-Grained Parallelism Through a Combination of Hardware and Software Techniques.
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991
1990
An Area-Efficient Register Alias Table for Implementing HPS.
Proceedings of the 1990 International Conference on Parallel Processing, 1990
1989
IEEE Trans. Syst. Man Cybern., 1989
Real Machines: Design Choices / Engineering Trade-Offs - Guest Editor's Introduction.
Computer, 1989
Unification Parallelism: How Much Can We Exploit?
Proceedings of the Logic Programming, 1989
Proceedings of the 22nd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1989
Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989
Performance benefits of large execution atomic units in dynamically scheduled machines.
Proceedings of the 3rd international conference on Supercomputing, 1989
1988
The Use of Microcode Instrumentation for Development, Debugging and Tuning of Operating System Kernels.
Proceedings of the 1988 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1988
Proceedings of the 21st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1988, San Diego, California, USA, November 28, 1988
Proceedings of the 21st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1988, San Diego, California, USA, November 28, 1988
Proceedings of the 2nd international conference on Supercomputing, 1988
1987
IEEE Trans. Computers, 1987
Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987
Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987
Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987
Proceedings of the 14th Annual International Symposium on Computer Architecture. Pittsburgh, 1987
Proceedings of the 14th Annual International Symposium on Computer Architecture. Pittsburgh, 1987
Advantages of Implementing PROLOG by Microprogramming a Host General Purpose Computer.
Proceedings of the Logic Programming, 1987
1986
Proceedings of the 19th annual workshop on Microprogramming, 1986
Proceedings of the 19th annual workshop on Microprogramming, 1986
Proceedings of the 19th annual workshop on Microprogramming, 1986
Experiments with HPS, a Restricted Data Flow Microarchitecture for High Performance Computers.
Proceedings of the Spring COMPCON'86, 1986
High Performance Prolog, The Multiplicative Effect of Several Levels of Implementation.
Proceedings of the Spring COMPCON'86, 1986
1985
Retrofitting the VAX-11/780 Microarchitecture for IEEE Floating Point Arithmetic - Implementation Issues, Measurements, and Analysis.
IEEE Trans. Computers, 1985
Proceedings of the 18th annual workshop on Microprogramming, 1985
Proceedings of the 18th annual workshop on Microprogramming, 1985
Proceedings of the 18th annual workshop on Microprogramming, 1985
Proceedings of the 18th annual workshop on Microprogramming, 1985
Proceedings of the 12th Annual Symposium on Computer Architecture, 1985
Aquarius - A High Performance Computing System for Symbolic/Numeric Applications.
Proceedings of the Spring COMPCON'85, 1985
1984
Alternative proposals for implementing Prolog concurrently and implications regarding their respective microarchitectures.
Proceedings of the 17th annual workshop on Microprogramming, 1984
Proceedings of the 17th annual workshop on Microprogramming, 1984
The Aquarius Project.
Proceedings of the COMPCON'84, Digest of Papers, Twenty-Eighth IEEE Computer Society International Conference, San Francisco, California, USA, February 27, 1984
1979
Some results on the asymptotic behavior of functions on subsets of the natural numbers.
Proceedings of the 17th Annual Southeast Regional Conference, 1979
1977
Notre Dame J. Formal Log., 1977
1975
J. Comput. Syst. Sci., 1975
1973
Optimal and Near-Optimal Universal Logic Modules with Interconnected External Terminals.
IEEE Trans. Computers, 1973
1972
IEEE Trans. Computers, 1972
Decision Procedures for Surjectivity and Injectivity of Parallel Maps for Tessellation Structures.
J. Comput. Syst. Sci., 1972
1969
Commun. ACM, 1969
1967
Proceedings of the American Federation of Information Processing Societies: Proceedings of the AFIPS '67 Spring Joint Computer Conference, 1967