Ahmed Ben Atitallah

Orcid: 0000-0002-2121-4417

According to our database1, Ahmed Ben Atitallah authored at least 32 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Broadband, high gain 2 × 2 spiral shaped resonator based and graphene assisted terahertz MIMO antenna for biomedical and WBAN communication.
Wirel. Networks, January, 2024

2023
Embedded implementation of an obstacle detection system for blind and visually impaired persons' assistance navigation.
Comput. Electr. Eng., May, 2023

Obstacle Detection System for Navigation Assistance of Visually Impaired People Based on Deep Learning Techniques.
Sensors, 2023

An Efficient Text Recognition System from Complex Color Image for Helping the Visually Impaired Persons.
Comput. Syst. Sci. Eng., 2023

Metasurface-Inspired Flexible Wearable MIMO Antenna Array for Wireless Body Area Network Applications and Biomedical Telemetry Devices.
IEEE Access, 2023

2022
An FPGA Design for Real-Time Image Denoising.
Comput. Syst. Sci. Eng., 2022

2021
A new hardware architecture of the adaptive vector median filter and validation in a hardware/software environment.
Int. J. Circuit Theory Appl., 2021

2020
An FPGA comparative study of high-level and low-level combined designs for HEVC intra, inverse quantization, and IDCT/IDST 2D modules.
Int. J. Circuit Theory Appl., 2020

An optimized FPGA design of inverse quantization and transform for HEVC decoding blocks and validation in an SW/HW environment.
Turkish J. Electr. Eng. Comput. Sci., 2020

High-level design of HEVC intra prediction algorithm.
Proceedings of the 5th International Conference on Advanced Technologies for Signal and Image Processing, 2020

2019
Case study of an HEVC decoder application using high-level synthesis: intraprediction, dequantization, and inverse transform blocks.
J. Electronic Imaging, 2019

New Gamma Correction Method for real time image text extraction.
Proceedings of the Ninth International Conference on Image Processing Theory, 2019

2018
Customer Satisfaction Measuring Based on the Most Significant Facial Emotion.
Proceedings of the 15th International Multi-Conference on Systems, Signals & Devices, 2018

2017
Design exploration of efficient implementation on SoC heterogeneous platform: HEVC intra prediction application.
Int. J. Circuit Theory Appl., 2017

2016
An optimized hardware architecture of 4×4, 8×8, 16×16 and 32×32 inverse transform for HEVC.
Proceedings of the 2nd International Conference on Advanced Technologies for Signal and Image Processing, 2016

Reduction of impulsive noise in colour image using an Adaptive Vector Distance Directional Filter.
Proceedings of the 2nd International Conference on Advanced Technologies for Signal and Image Processing, 2016

2015
An efficient hardware architecture for interpolation filter of HEVC decoder.
Proceedings of the 12th IEEE International Multi-Conference on Systems, Signals & Devices, 2015

SW implementation of video coding using open virtual platform.
Proceedings of the 12th IEEE International Multi-Conference on Systems, Signals & Devices, 2015

2014
An optimized hardware architecture for intra prediction for HEVC.
Proceedings of the International Image Processing, 2014

2013
A Very High Throughput Deblocking Filter for H.264/AVC.
J. Signal Process. Syst., 2013

Reconfigurable architecture of VDF filter for multidimensional data.
Int. J. Circuit Theory Appl., 2013

An efficient architecture VLSI for 4×4 intra prediction in HEVC standard.
Proceedings of the 10th International Multi-Conferences on Systems, Signals & Devices, 2013

2012
FPGA architecture of the LDPS Motion Estimation for H.264/AVC Video Coding.
J. Signal Process. Syst., 2012

Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator.
Proceedings of the 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2012

2011
HW/SW TQ/IQT design for H.264/AVC.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010
HW/SW Design-Based Implementation of Vector Median Rational Hybrid Filter.
Int. Arab J. Inf. Technol., 2010

FPGA Design of an Intra 16 × 16 Module for H.264/AVC Video Encoder.
Circuits Syst., 2010

2008
FPGA implementation of a HW/SW platform for multimedia embedded systems.
Des. Autom. Embed. Syst., 2008

2007
HW/SW FPGA Architecture for a Flexible Motion Estimation.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006
An Efficient HW/SW Implementation of the H.263 Video Coder in FPGA.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

Optimization and Implementation on Fpga of the DCT/IDCT Algorithm.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

HW/SW Codesign of the H.263 Video Coder.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006


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