Imen Werda

Orcid: 0000-0001-9631-3252

According to our database1, Imen Werda authored at least 8 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Fast partition algorithm in depth map intra coding unit based on multi-deep convolution neural network.
J. Real Time Image Process., February, 2024

2022
HEVC coding unit decision based on machine learning.
Signal Image Video Process., 2022

Fast HEVC intra-CU decision partition algorithm with modified LeNet-5 and AlexNet.
Signal Image Video Process., 2022

2012
Real-time H.264/AVC baseline decoder implementation on TMS320C6416.
J. Real Time Image Process., 2012

2010
Optimal DSP Based Integer Motion Estimation Implementation for H.264/AVC Baseline Encoder.
Int. Arab J. Inf. Technol., 2010

FPGA Design of an Intra 16 × 16 Module for H.264/AVC Video Encoder.
Circuits Syst., 2010

2008
DSP CAVLC implementation and optimization for H.264/AVC baseline encoder.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2006
Analysis and Optimization of UB Video's H.264 Baseline Encoder Implementation on Texas Instruments' TMS320DM642 DSP.
Proceedings of the International Conference on Image Processing, 2006


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