Patrice Kadionik

According to our database1, Patrice Kadionik authored at least 12 papers between 1997 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2013
A Very High Throughput Deblocking Filter for H.264/AVC.
J. Signal Process. Syst., 2013

2012
FPGA architecture of the LDPS Motion Estimation for H.264/AVC Video Coding.
J. Signal Process. Syst., 2012

2010
HW/SW Design-Based Implementation of Vector Median Rational Hybrid Filter.
Int. Arab J. Inf. Technol., 2010

FPGA Design of an Intra 16 × 16 Module for H.264/AVC Video Encoder.
Circuits Syst., 2010

SIP as a Universal Communication Bus: A Methodology and an Experimental Study.
Proceedings of IEEE International Conference on Communications, 2010

2008
FPGA implementation of a HW/SW platform for multimedia embedded systems.
Des. Autom. Embed. Syst., 2008

A SIP-Based Programming Framework for Advanced Telephony Applications.
Proceedings of the Principles, 2008

2007
HW/SW FPGA Architecture for a Flexible Motion Estimation.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006
An Efficient HW/SW Implementation of the H.263 Video Coder in FPGA.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

Optimization and Implementation on Fpga of the DCT/IDCT Algorithm.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

HW/SW Codesign of the H.263 Video Coder.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

1997
A World-Wide-Web based instrumentation pool real testing in a virtual world.
Proceedings of the 1997 IEEE International Conference on Microelectronic Systems Education, 1997


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