Tae-Kwang Jang
Orcid: 0000-0002-4651-0677
According to our database1,
Tae-Kwang Jang
authored at least 61 papers
between 2008 and 2024.
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Bibliography
2024
A Sub-mm<sup>3</sup> Wireless Neural Stimulator IC for Visual Cortical Prosthesis With Optical Power Harvesting and 7.5-kb/s Data Telemetry.
IEEE J. Solid State Circuits, April, 2024
An Impedance-Boosted Transformer-First Discrete-Time Analog Front-End Achieving 0.34 NEF and 389-MΩ Input Impedance.
IEEE J. Solid State Circuits, April, 2024
Designing Circuits for AiMC Based on Non-Volatile Memories: A Tutorial Brief on Trade-Off and Strategies for ADCs and DACs Co-Design.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
2023
A 21.4 pW Subthreshold Voltage Reference with 0.020 %/V Line Sensitivity Using DIBL Compensation.
Sensors, February, 2023
A 4.1W/mm² Peak Power Density and 77% Peak Efficiency Fully Integrated DC-DC Converter based on Electromagnetically Coupled Class-D LC Oscillators and a Resonant LC Flying Impedance in 22nm FDSOI CMOS.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A 1, 024-Channel, 64-Interconnect, Capacitive Neural Interface Using a Cross-Coupled Microelectrode Array and 2-Dimensional Code-Division Multiplexing.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
An Energy-Efficient Impedance-Boosted Discrete-Time Amplifier Achieving 0.34 Noise Efficiency Factor and 389 MΩ Input Impedance.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
An 8b 1.0-to-1.25GS/s 0.7-to-0.8V Single-Stage Time-Based Gated-Ring-Oscillator ADC with $2\times$ Interpolating Sense-Amplifier-Latches.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A High-Order-Temperature-Compensated 328kHz On Chip RC Timer Using Time-Interleaved Resistors Achieving 1.5pJ/Cycle and 5.86ppm°C.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
A Jitter-Programmable Bang-Bang Phase-Locked Loop Using PVT Invariant Stochastic Jitter Monitor.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
IEEE J. Solid State Circuits, 2022
A Light-Tolerant Wireless Neural Recording IC for Motor Prediction With Near-Infrared-Based Power and Data Telemetry.
IEEE J. Solid State Circuits, 2022
A 0.0014 mm<sup>2</sup>, 1.18 TΩ Segmented Duty-Cycled Resistor Replacing Pseudo-Resistor for Neural Recording Interface Circuits.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
A 260×274 μm<sup>2</sup> 572 nW Neural Recording Micromote Using Near-Infrared Power Transfer and an RF Data Uplink.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
A Second-Order Temperature-Compensated On-Chip R-RC Oscillator Achieving 7.93ppm/°C and 3.3pJ/Hz in -40°C to 125°C Temperature Range.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
An Energy-Efficient Spiking Neural Network for Finger Velocity Decoding for Implantable Brain-Machine Interface.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Trans. Computers, 2021
IEEE J. Solid State Circuits, 2021
A 1.25-GHz Fully Integrated DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators.
IEEE J. Solid State Circuits, 2021
A 2.3GHz Fully Integrated DC-DC Converter based on Electromagnetically Coupled Class-D LC Oscillators achieving 78.1% Efficiency in 22nm FDSOI CMOS.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
17.3 A 1.25GHz Fully Integrated DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
An Offset Charge Compensating Biphasic Neuro - stimulation for Faradaic DC-Current Reduction.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
A 8.7ppm/°C, 694nW, One-Point Calibrated RC Oscillator using a Nonlinearity-Aware Dual Phase-Locked Loop and DSM-Controlled Frequency-Locked Loops.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
26.9 A 0.19×0.17mm<sup>2</sup> Wireless Neural Recording IC for Motor Prediction with Near-Infrared-Based Power and Data Telemetry.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
3.3 A 0.51nW 32kHz Crystal Oscillator Achieving 2ppb Allan Deviation Floor Using High-Energy-to-Noise-Ratio Pulse Injection.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
An Efficient Piezoelectric Energy Harvesting Interface Circuit Using a Sense-and-Set Rectifier.
IEEE J. Solid State Circuits, 2019
A Reference Oversampling Digital Phase-Locked Loop with -240 dB FOM and -80 dBc Reference Spur.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
A 1.74.12 mm<sup>3</sup> Fully Integrated pH Sensor for Implantable Applications using Differential Sensing and Drift-Compensation.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
An Adiabatic Sense and Set Rectifier for Improved Maximum-Power-Point Tracking in Piezoelectric Harvesting with 541% Energy Extraction Gain.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2018
Always-On 12-nW Acoustic Sensing and Object Recognition Microsystem for Unattended Ground Sensor Nodes.
IEEE J. Solid State Circuits, 2018
A Noise Reconfigurable All-Digital Phase-Locked Loop Using a Switched Capacitor-Based Frequency-Locked Loop and a Noise Detector.
IEEE J. Solid State Circuits, 2018
A 224 PW 260 PPM/°C Gate-Leakage-Based Timer for Ultra-Low Power Sensor Nodes with Second-Order Temperature Dependency Cancellation.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
A receiver/antenna co-design for a 1.5mJ per fix fully-integrated 10×10×6mm<sup>3</sup> GPS logger.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II - Data Communication, Energy Harvesting, Power Management, and Digital Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part I - Analog Circuit Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
21.6 A 12nW always-on acoustic sensing and object recognition microsystem using frequency-domain feature extraction and SVM classification.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
8.4 A 2.5ps 0.8-to-3.2GHz bang-bang phase- and frequency-detector-based all-digital PLL with noise self-adjustment.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2016
IEEE J. Solid State Circuits, 2016
A Resonant Current-Mode Wireless Power Receiver and Battery Charger With -32 dBm Sensitivity for Implantable Systems.
IEEE J. Solid State Circuits, 2016
A 110 nW Resistive Frequency Locked On-Chip Oscillator with 34.3 ppm/°C Temperature Stability for System-on-Chip Designs.
IEEE J. Solid State Circuits, 2016
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
Proceedings of the 2016 IEEE International Conference on RFID, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
21.5 A current-mode wireless power receiver with optimal resonant cycle tracking for implantable systems.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
A 99nW 70.4kHz resistive frequency locking on-chip oscillator with 27.4ppm/ºC temperature stability.
Proceedings of the Symposium on VLSI Circuits, 2015
FOCUS: Key building blocks and integration strategy of a miniaturized wireless sensor node.
Proceedings of the ESSCIRC Conference 2015, 2015
2014
15.2 A 0.012mm<sup>2</sup> 3.1mW bang-bang digital fractional-N PLL with a power-supply-noise cancellation technique and a walking-one-phase-selection fractional frequency divider.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Proceedings of the ESSCIRC 2014, 2014
2013
A 0.026mm<sup>2</sup> 5.3mW 32-to-2000MHz digital fractional-N phase locked-loop using a phase-interpolating phase-to-digital converter.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
A Highly-Digital VCO-Based Analog-to-Digital Converter Using Phase Interpolator and Digital Calibration.
IEEE Trans. Very Large Scale Integr. Syst., 2012
A 0.004mm<sup>2</sup> 250μW ΔΣ TDC with time-difference accumulator and a 0.012mm<sup>2</sup> 2.5mW bang-bang digital PLL using PRNG for low-power SoC applications.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2011
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011
2010
Analysis and Design of Voltage-Controlled Oscillator Based Analog-to-Digital Converter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008