Ahmed Rezine

Orcid: 0000-0002-0440-4753

According to our database1, Ahmed Rezine authored at least 50 papers between 2005 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Verification-Friendly Deep Neural Networks.
CoRR, 2023

SafeDeep: A Scalable Robustness Verification Framework for Deep Neural Networks.
Proceedings of the IEEE International Conference on Acoustics, 2023

2022
Symbolic identification of shared memory based bank conflicts for GPUs.
J. Syst. Archit., 2022

2021
Correction to: An integrated specification and verification technique for highly concurrent data structures.
Int. J. Softw. Tools Technol. Transf., 2021

Breaking Silos to Guarantee Control Stability with Communication over Ethernet TSN.
IEEE Des. Test, 2021

2020
Software-Based Self-Testing Using Bounded Model Checking for Out-of-Order Superscalar Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Verifying Safety of Parameterized Heard-Of Algorithms.
Proceedings of the Networked Systems - 8th International Conference, 2020

2019
Quantifying the Information Leakage in Cache Attacks via Symbolic Execution.
ACM Trans. Embed. Comput. Syst., 2019

On Reachability in Parameterized Phaser Programs.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2019

2018
Trau: SMT solver for string constraints.
Proceedings of the 2018 Formal Methods in Computer Aided Design, 2018

Stability-aware integrated routing and scheduling for control applications in Ethernet networks.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
An integrated specification and verification technique for highly concurrent data structures.
Int. J. Softw. Tools Technol. Transf., 2017

Flatten and conquer: a framework for efficient analysis of string constraints.
Proceedings of the 38th ACM SIGPLAN Conference on Programming Language Design and Implementation, 2017

Quantifying the information leak in cache attacks via symbolic execution.
Proceedings of the 15th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2017

Safety verification of phaser programs.
Proceedings of the 2017 Formal Methods in Computer Aided Design, 2017

2016
Counting dynamically synchronizing processes.
Int. J. Softw. Tools Technol. Transf., 2016

Quantifying the Information Leak in Cache Attacks through Symbolic Execution.
CoRR, 2016

Lazy Constrained Monotonic Abstraction.
Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2016

2015
Abstracting and Counting Synchronizing Processes.
Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2015

Verification of Cache Coherence Protocols wrt. Trace Filters.
Proceedings of the Formal Methods in Computer-Aided Design, 2015

Norn: An SMT Solver for String Constraints.
Proceedings of the Computer Aided Verification - 27th International Conference, 2015

2014
Ordered Counter-Abstraction - Refinable Subword Relations for Parameterized Verification.
Proceedings of the Language and Automata Theory and Applications, 2014

String Constraints for Verification.
Proceedings of the Computer Aided Verification - 26th International Conference, 2014

2013
Memorax, a Precise and Sound Tool for Automatic Fence Insertion under TSO.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2013

Verifying safety and liveness for the FlexTM hybrid transactional memory.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
A lightweight regular model checking approach for parameterized systems.
Int. J. Softw. Tools Technol. Transf., 2012

Ordered Counter-Abstraction
CoRR, 2012

Counter-Example Guided Fence Insertion under TSO.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2012

Automatic Fence Insertion in Integer Programs via Predicate Abstraction.
Proceedings of the Static Analysis - 19th International Symposium, 2012

Detecting Key Players in Terrorist Networks.
Proceedings of the 2012 European Intelligence and Security Informatics Conference, 2012

Automatic Test Program Generation for Out-of-Order Superscalar Processors.
Proceedings of the 21st IEEE Asian Test Symposium, 2012

2011
Automatic Verification of Directory-Based Consistency Protocols with Graph Constraints.
Int. J. Found. Comput. Sci., 2011

2010
Constrained Monotonic Abstraction: A CEGAR for Parameterized Verification.
Proceedings of the CONCUR 2010 - Concurrency Theory, 21th International Conference, 2010

Invariant Synthesis for Programs Manipulating Lists with Unbounded Data.
Proceedings of the Computer Aided Verification, 22nd International Conference, 2010

2009
Monotonic Abstraction: on Efficient Verification of Parameterized Systems.
Int. J. Found. Comput. Sci., 2009

Approximated parameterized verification of infinite-state processes with global conditions.
Formal Methods Syst. Des., 2009

Automatic Verification of Directory-Based Consistency Protocols.
Proceedings of the Reachability Problems, 3rd International Workshop, 2009

Approximated Context-Sensitive Analysis for Parameterized Verification.
Proceedings of the Formal Techniques for Distributed Systems, 2009

2008
Parameterized Systems: Generalizing and Simplifying Automatic Verification.
PhD thesis, 2008

Monotonic Abstraction in Parameterized Verification.
Proceedings of the Second Workshop on Reachability Problems in Computational Models, 2008

Handling Parameterized Systems with Non-atomic Global Conditions.
Proceedings of the Verification, 2008

Monotonic Abstraction in Action.
Proceedings of the Theoretical Aspects of Computing, 2008

Parameterized Tree Systems.
Proceedings of the Formal Techniques for Networked and Distributed Systems, 2008

Shape Analysis via Monotonic Abstraction.
Proceedings of the Beyond the Finite: New Challenges in Verification and Semistructured Data, 20.04., 2008

Monotonic Abstraction for Programs with Dynamic Memory Heaps.
Proceedings of the Computer Aided Verification, 20th International Conference, 2008

2007
Regular Model Checking Without Transducers (On Efficient Verification of Parameterized Systems).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2007

Parameterized Verification of Infinite-State Processes with Global Conditions.
Proceedings of the Computer Aided Verification, 19th International Conference, 2007

2006
Tree regular model checking: A simulation-based approach.
J. Log. Algebraic Methods Program., 2006

Proving Liveness by Backwards Reachability.
Proceedings of the CONCUR 2006 - Concurrency Theory, 17th International Conference, 2006

2005
Simulation-Based Iteration of Tree Transducers.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2005


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