Jianhui Jiang

Orcid: 0000-0002-5829-8423

According to our database1, Jianhui Jiang authored at least 64 papers between 1999 and 2024.

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Bibliography

2024
Identifying Reliability High-Correlated Gates of Logic Circuits With Pearson Correlation Coefficient.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

A Reliability-Critical Path Identifying Method With Local and Global Adjacency Probability Matrix in Combinational Circuits.
IEEE Trans. Computers, January, 2024

2023
Fast Area Optimization Approach for XNOR/OR-based Fixed Polarity Reed-Muller Logic Circuits based on Multi-strategy Wolf Pack Algorithm.
ACM Trans. Design Autom. Electr. Syst., 2023

On Error Representativeness of Function Call Interfaces for C/C++ Program.
Proceedings of the 23rd IEEE International Conference on Software Quality, 2023

Adaptive Tracing and Fault Injection based Fault Diagnosis for Open Source Server Software.
Proceedings of the 23rd IEEE International Conference on Software Quality, 2023

2022
BMC-Based Temperature-Aware SBST for Worst-Case Delay Fault Testing Under High Temperature.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Accurate Reliability Boundary Evaluation of Approximate Arithmetic Circuit.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Identifying Reliability-Critical Primary Inputs of Combinational Circuits Based on the Model of Gate-Sensitive Attributes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Accelerating stochastic-based reliability estimation for combinational circuits at RTL using GPU parallel computing.
Int. J. Intell. Syst., 2022

Fault Injection based Failure Analysis of CentOS, Anolis OS and OpenEuler.
CoRR, 2022

AFETM: Adaptive function execution trace monitoring for fault diagnosis.
CoRR, 2022

Automatic Keyphrase Generation by Incorporating Dual Copy Mechanisms in Sequence-to-Sequence Learning.
Proceedings of the 29th International Conference on Computational Linguistics, 2022

A Domain Knowledge Enhanced Pre-Trained Language Model for Vertical Search: Case Study on Medicinal Products.
Proceedings of the 29th International Conference on Computational Linguistics, 2022

Locating Critical-Reliability Gates for Sequential Circuits based on the Time Window Graph Model.
Proceedings of the IEEE 31st Asian Test Symposium, 2022

2021
A Deterministic-Path Routing Algorithm for Tolerating Many Faults on Very-Large-Scale Network-on-Chip.
ACM Trans. Design Autom. Electr. Syst., 2021

Probability gate model based methods for approximate arithmetic circuits reliability estimation.
CCF Trans. High Perform. Comput., 2021

Reliability Evaluation of Approximate Arithmetic Circuits Based on Signal Probability.
Proceedings of the IEEE International Test Conference in Asia, 2021

Multi-Feature Fusion based Image Steganography using GAN.
Proceedings of the IEEE International Symposium on Software Reliability Engineering, 2021

Computation Offloading and Task Scheduling with Fault-Tolerance for Minimizing Redundancy in Edge Computing.
Proceedings of the IEEE International Symposium on Software Reliability Engineering, 2021

2020
Modeling and Analyzing Linear Wireless Sensor Networks With Backbone Support.
IEEE Trans. Syst. Man Cybern. Syst., 2020

Reliability Analysis of IoT Networks with Community Structures.
IEEE Trans. Netw. Sci. Eng., 2020

Software-Based Self-Testing Using Bounded Model Checking for Out-of-Order Superscalar Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Parallel Genetic Algorithm to Extend the Lifespan of Internet of Things in 5G Networks.
IEEE Access, 2020

Arbitrary Shape Natural Scene Text Detection Method Based on Soft Attention Mechanism and Dilated Convolution.
IEEE Access, 2020

A Reliability Automatic Assessment Framework of Open Source Software Based on JIRA.
Proceedings of the 9th International Conference on Software and Computer Applications, 2020

Fault Diagnosis for Open Source Software Based on Dynamic Tracking.
Proceedings of the 7th International Conference on Dependable Systems and Their Applications, 2020

HIT: A Hidden Instruction Trojan Model for Processors.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
A Fast and Effective Sensitivity Calculation Method for Circuit Input Vectors.
IEEE Trans. Reliab., 2019

A Locating Method for Reliability-Critical Gates with a Parallel-Structured Genetic Algorithm.
J. Comput. Sci. Technol., 2019

Failure probability analysis and critical node determination for approximate circuits.
Integr., 2019

Circuit reliability prediction based on deep autoencoder network.
Neurocomputing, 2019

Ensemble Methods for Anomaly Detection Based on System Log.
Proceedings of the 24th IEEE Pacific Rim International Symposium on Dependable Computing, 2019

Reliability Estimation of Approximate Circuits Based on Probabilistic Gate Model.
Proceedings of the 24th IEEE Pacific Rim International Symposium on Dependable Computing, 2019

A Reliability Automatic Assessment Framework for Open Source Software.
Proceedings of the 24th IEEE Pacific Rim International Symposium on Dependable Computing, 2019

A Deterministic-Path Routing Algorithm for Tolerating Many Faults on Wafer-Level NoC.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Thermal-aware SoC Test Scheduling with Voltage/Frequency Scaling and Test Partition.
J. Electron. Test., 2018

Blockchain Architecture Reliability-Based Measurement for Circuit Unit Importance.
IEEE Access, 2018

A Novel Trust Evaluation Method for Logic Circuits in IoT Applications Based on the E-PTM Model.
IEEE Access, 2018

Methods for Approximate Adders Reliability Estimation Based on PTM Model.
Proceedings of the 23rd IEEE Pacific Rim International Symposium on Dependable Computing, 2018

Small Trojan Testing Using Bounded Model Checking.
Proceedings of the IEEE International Test Conference in Asia, 2018

2017
High-level Fault Diagnosis on network-on-chip using path tracking.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017

Software-based online self-testing of network-on-chip using bounded model checking.
Proceedings of the IEEE International Test Conference, 2017

2016
Circuit reliability estimation based on an iterative PTM model with hybrid coding.
Microelectron. J., 2016

软差错影响下的电路可靠性分析 (Reliability Analysis of Circuit under Soft Error).
计算机科学, 2016

2015
Effect of Bias Temperature Instability on Soft Error Rate.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2015

Temperature-aware software-based self-testing for delay faults.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
Exploit Dynamic Voltage and Frequency Scaling for SoC Test Scheduling under Thermal Constraints.
Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013
Program behavior characterization and clustering: An empirical study for failure clustering.
Proceedings of the IEEE 24th International Symposium on Software Reliability Engineering, 2013

2012
Code Reuse Prevention through Control Flow Lazily Check.
Proceedings of the IEEE 18th Pacific Rim International Symposium on Dependable Computing, 2012

Mapping Algorithm for Coarse-Grained Reconfigurable Multimedia Architectures.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

2011
Easing Instruction Queue Competition among Threads in RMT.
J. Comput., 2011

AC-RMT: A Fault-Tolerance Smt Architecture Based On Asynchronous Checkpoint.
Intell. Autom. Soft Comput., 2011

A Method of Gate-Level Circuit Reliability Estimation Based on Iterative PTM Model.
Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing, 2011

2010
An Asynchronous Checkpoint-Based Redundant Multithreading Architecture.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010

Sequential Frequency Vector Based System Call Anomaly Detection.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010

Reliability Evaluation of Flip-Flops Based on Probabilistic Transfer Matrices.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010

A Safe Measurement-Based Worst-Case Execution Time Estimation Using Automatic Test-Data Generation.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010

A Study on Software Reliability Prediction Based on Transduction Inference.
Proceedings of the 19th IEEE Asian Test Symposium, 2010

2009
Fault Injection Scheme for Embedded Systems at Machine Code Level and Verification.
Proceedings of the 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing, 2009

Frequency Weighted Hamming Distance for System Call Anomaly Detection.
Proceedings of the CSIE 2009, 2009 WRI World Congress on Computer Science and Information Engineering, March 31, 2009

2008
A New Method for Test Suite Reduction.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

A PIN-Based Dynamic Software Fault Injection System.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

2003
Fault-Tolerant Systems with Concurrent Error-Locating Capability.
J. Comput. Sci. Technol., 2003

1999
A Novel NMR Structure with Concurrent Error Location Capabilities.
Proceedings of the 1999 Pacific Rim International Symposium on Dependable Computing (PRDC 1999), 1999


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