Petru Eles
According to our database^{1},
Petru Eles
authored at least 225 papers
between 1992 and 2019.
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Bibliography
2019
Scheduling optimization with partitioning for mixedcriticality systems.
Journal of Systems Architecture  Embedded Systems Design, 2019
2018 Embedded Systems Week (ESWEEK) in Torino.
IEEE Design & Test, 2019
On Reachability in Parameterized Phaser Programs.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2019
CacheAware Kernel Tiling: An Approach for SystemLevel Performance Optimization of GPUBased Applications.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Runtime Resource Management with Workload Prediction.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Partitioned and overheadaware scheduling of mixedcriticality realtime systems.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2018
Guest Editorial for the Special Issue of ESWEEK 2016.
ACM Trans. Embedded Comput. Syst., 2018
Editorial.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2018
Optimization of Message Encryption for RealTime Applications in Embedded Systems.
IEEE Trans. Computers, 2018
Roundtable: Machine Learning for Embedded Systems: Hype or Lasting Impact?
IEEE Design & Test, 2018
ControlQualityDriven Design of Embedded Control Systems with Stability Guarantees.
IEEE Design & Test, 2018
Measurement Based Execution Time Analysis of GPGPU Programs via SE+GA.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
Stabilityaware integrated routing and scheduling for control applications in Ethernet networks.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Networked RealTime Embedded Systems.
Proceedings of the Handbook of Hardware/Software Codesign., 2017
Introduction to Hardware/Software Codesign.
Proceedings of the Handbook of Hardware/Software Codesign., 2017
Probabilistic Analysis of Electronic Systems via Adaptive Hierarchical Interpolation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017
Workload prediction for runtime resource management.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017
Safety verification of phaser programs.
Proceedings of the 2017 Formal Methods in Computer Aided Design, 2017
TwoPhase Interarrival Time Prediction for Runtime Resource Management.
Proceedings of the Euromicro Conference on Digital System Design, 2017
LatencyAware Packet Processing on CPUGPU Heterogeneous Systems.
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
CorrelationAware Probabilistic Timing Analysis for the Dynamic Segment of FlexRay.
ACM Trans. Embedded Comput. Syst., 2016
PowerAware Design Techniques of Secure Multimode Embedded Systems.
ACM Trans. Embedded Comput. Syst., 2016
Guest Editorial for Special Issue of ESWEEK 2015.
ACM Trans. Embedded Comput. Syst., 2016
A Reconfigurable Framework for Performance Enhancement With Dynamic FPGA Configuration Prefetching.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016
Analysis and Design of RealTime Servers for Control Applications.
IEEE Trans. Computers, 2016
Counting dynamically synchronizing processes.
STTT, 2016
Systematic detection of memory related performance bottlenecks in GPGPU programs.
Journal of Systems Architecture  Embedded Systems Design, 2016
Lazy Constrained Monotonic Abstraction.
Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2016
IntrusionDamage Assessment and Mitigation in CyberPhysical Systems for Control Applications.
Proceedings of the 24th International Conference on RealTime Networks and Systems, 2016
Selftriggered controllers and hard realtime guarantees.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
SPARTA: A scheduling policy for thwarting differential power analysis attacks.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
TemperatureCentric Reliability Analysis and Optimization of Electronic Systems Under Process Variation.
IEEE Trans. VLSI Syst., 2015
TemperatureGradientBased BurnIn and Test Scheduling for 3D Stacked ICs.
IEEE Trans. VLSI Syst., 2015
Stability of Online Resource Managers for Distributed Systems under Execution Time Variations.
ACM Trans. Embedded Comput. Syst., 2015
A TestOrdering Based TemperatureCycling Acceleration Technique for 3D Stacked ICs.
J. Electronic Testing, 2015
Abstracting and Counting Synchronizing Processes.
Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2015
Jfair: a scheduling algorithm to stabilize control applications.
Proceedings of the 21st IEEE RealTime and Embedded Technology and Applications Symposium, 2015
PerceptionAware Power Management for Mobile Games via Dynamic Resolution Scaling.
Proceedings of the IEEE/ACM International Conference on ComputerAided Design, 2015
Efficient Test Application for Rapid MultiTemperature Testing.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Onthefly energy minimization for multimode realtime systems on heterogeneous platforms.
Proceedings of the 13th IEEE Symposium on Embedded Systems For Realtime Multimedia, 2015
Probabilistic Response Time and Joint Analysis of Periodic Tasks.
Proceedings of the 27th Euromicro Conference on RealTime Systems, 2015
An integrated temperaturecycling acceleration and test technique for 3D stacked ICs.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
Quantifying Notions of Extensibility in FlexRay Schedule Synthesis.
ACM Trans. Design Autom. Electr. Syst., 2014
Probabilistic Analysis of Power and Temperature Under Process Variation for Electronic System Design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2014
TimePredictable Embedded Software on MultiCore Platforms: Analysis and Optimization.
Foundations and Trends in Electronic Design Automation, 2014
ProcessVariation Aware Multitemperature Test Scheduling.
Proceedings of the 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, 2014
Schedulability analysis of Ethernet AVB switches.
Proceedings of the 2014 IEEE 20th International Conference on Embedded and RealTime Computing Systems and Applications, 2014
Robustness Analysis of RealTime Scheduling Against Differential Power Analysis Attacks.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
Automated software testing of memory performance in embedded GPUs.
Proceedings of the 2014 International Conference on Embedded Software, 2014
Bandwidthefficient controllerserver codesign with stability guarantees.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
An efficient temperaturegradient based burnin technique for 3D stacked ICs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Saving energy without defying deadlines on mobile GPUbased heterogeneous systems.
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014
Statistical analysis of process variation based on indirect measurements for electronic system design.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
Stability of adaptive feedbackbased resource managers for systems with execution time variations.
RealTime Systems, 2013
ProcessVariation and Temperature Aware SoC Test Scheduling Technique.
J. Electronic Testing, 2013
General purpose computing on lowpower embedded GPUs: Has it come of age?
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013
Designing BandwidthEfficient Stabilizing Control Servers.
Proceedings of the IEEE 34th RealTime Systems Symposium, 2013
Energyaware design of secure multimode realtime embedded systems with FPGA coprocessors.
Proceedings of the 21st International Conference on RealTime Networks and Systems, 2013
Temperaturegradient based test scheduling for 3D stacked ICs.
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Stabilityaware analysis and design of embedded control systems.
Proceedings of the International Conference on Embedded Software, 2013
Probabilistic Timing Analysis for the Dynamic Segment of FlexRay.
Proceedings of the 25th Euromicro Conference on RealTime Systems, 2013
Dynamic configuration prefetching based on piecewise linear prediction.
Proceedings of the Design, Automation and Test in Europe, 2013
Optimization of secure embedded systems with dynamic task sets.
Proceedings of the Design, Automation and Test in Europe, 2013
Controlquality driven design of cyberphysical systems with robustness guarantees.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
TemperatureAware Idle Time Distribution for Leakage Energy Optimization.
IEEE Trans. VLSI Syst., 2012
Scheduling and Optimization of FaultTolerant Embedded Systems with Transparency/Performance TradeOffs.
ACM Trans. Embedded Comput. Syst., 2012
Introduction to the Special Section on ESTIMedia'08.
ACM Trans. Embedded Comput. Syst., 2012
LowEnergy StandbySparing for Hard RealTime Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2012
Customizing Instruction Set Extensible Reconfigurable Processors Using GPUs.
Proceedings of the 25th International Conference on VLSI Design, 2012
On the timing analysis of the dynamic segment of FlexRay.
Proceedings of the 7th IEEE International Symposium on Industrial Embedded Systems, 2012
Designing HighQuality Embedded Control Systems with Guaranteed Stability.
Proceedings of the 33rd IEEE RealTime Systems Symposium, 2012
ContextAware Speculative Prefetch for Soft RealTime Applications.
Proceedings of the 2012 IEEE International Conference on Embedded and RealTime Computing Systems and Applications, 2012
ReliabilityAware Instruction Set Customization for ASIPs with Hardened Logic.
Proceedings of the 2012 IEEE International Conference on Embedded and RealTime Computing Systems and Applications, 2012
Schedulability Analysis for the Dynamic Segment of FlexRay: A Generalization to Slot Multiplexing.
Proceedings of the 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium, 2012
Minimization of average execution time based on speculative FPGA configuration prefetch.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
ControlQuality Optimization for Distributed Embedded Systems with Adaptive Fault Tolerance.
Proceedings of the 24th Euromicro Conference on RealTime Systems, 2012
A scalable GPUbased approach to accelerate the multiplechoice knapsack problem.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Codesign techniques for distributed realtime embedded systems with communication security constraints.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Steadystate dynamic temperature analysis and reliability optimization for embedded multiprocessor systems.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Automatic Test Program Generation for OutofOrder Superscalar Processors.
Proceedings of the 21st IEEE Asian Test Symposium, 2012
2011
QuasiStatic Voltage Scaling for Energy Minimization With Time Constraints.
IEEE Trans. VLSI Syst., 2011
ControlQuality Driven Task Mapping for Distributed Embedded Control Systems.
Proceedings of the 17th IEEE International Conference on Embedded and RealTime Computing Systems and Applications, 2011
Bus Access Design for Combined Worst and Average Case Execution Time Optimization of Predictable RealTime Applications on Multiprocessor SystemsonChip.
Proceedings of the 17th IEEE RealTime and Embedded Technology and Applications Symposium, 2011
Processvariation and temperature aware soc test scheduling using particle swarm optimization.
Proceedings of the 6th IEEE International Design and Test Workshop, 2011
Reliabilityaware frame packing for the static segment of flexray.
Proceedings of the 11th International Conference on Embedded Software, 2011
Stability Conditions of Online Resource Managers for Systems with Execution Time Variations.
Proceedings of the 23rd Euromicro Conference on RealTime Systems, 2011
Adaptive TemperatureAware SoC Test Scheduling Considering Process Variation.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011
Design Optimization and Synthesis of FlexRay Parameters for Embedded Control Applications.
Proceedings of the Sixth IEEE International Symposium on Electronic Design, 2011
Predictable WorstCase Execution Time Analysis for Multiprocessor SystemsonChip.
Proceedings of the Sixth IEEE International Symposium on Electronic Design, 2011
Online TemperatureAware Idle Time Distribution for Leakage Energy Optimization.
Proceedings of the Sixth IEEE International Symposium on Electronic Design, 2011
Optimization of message encryption for distributed embedded systems with realtime constraints.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011
On the quantification of sustainability and extensibility of FlexRay schedules.
Proceedings of the 48th Design Automation Conference, 2011
Performance optimization of error detection based on speculative reconfiguration.
Proceedings of the 48th Design Automation Conference, 2011
2010
Scheduling for FaultTolerant Communication on the Static Segment of FlexRay.
Proceedings of the 31st IEEE RealTime Systems Symposium, 2010
Dynamic Scheduling and ControlQuality Optimization of SelfTriggered Control Applications.
Proceedings of the 31st IEEE RealTime Systems Symposium, 2010
Low Overhead Dynamic QoS Optimization under Variable Task Execution Times.
Proceedings of the 16th IEEE International Conference on Embedded and RealTime Computing Systems and Applications, 2010
Valuebased scheduling of distributed faulttolerant realtime systems with soft and hard timing constraints.
Proceedings of the 8th IEEE Workshop on Embedded Systems for RealTime Multimedia, 2010
Message from the chairs.
Proceedings of the 8th IEEE Workshop on Embedded Systems for RealTime Multimedia, 2010
Multitemperature testing for corebased systemonchip.
Proceedings of the Design, Automation and Test in Europe, 2010
Temperatureaware idle time distribution for energy optimization with dynamic voltage scaling.
Proceedings of the Design, Automation and Test in Europe, 2010
Hardware/software optimization of error detection implementation for realtime embedded systems.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010
TemperatureAware SoC Test Scheduling Considering InterChip Process Variation.
Proceedings of the 19th IEEE Asian Test Symposium, 2010
2009
Design Optimization of Time and CostConstrained FaultTolerant Embedded Systems With Checkpointing and Replication.
IEEE Trans. VLSI Syst., 2009
Predictable Implementation of RealTime Applications on Multiprocessor Systems on Chip.
Proceedings of the 9th Intl. Workshop on WorstCase Execution Time Analysis, 2009
Immune Genetic Algorithms for Optimization of Task Priorities and FlexRay Frame Identifiers.
Proceedings of the 15th IEEE International Conference on Embedded and RealTime Computing Systems and Applications, 2009
2009 IEEE/ACM/IFIP 7^{th} workshop on embedded systems for RealTime multimedia (ESTIMedia 2009).
Proceedings of the 7th IEEE/ACM/IFIP Workshop on Embedded Systems for RealTime Multimedia, 2009
ThermalAware Test Scheduling for CoreBased SoC in an AbortonFirstFail Test Environment.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
Integrated scheduling and synthesis of control applications on distributed embedded systems.
Proceedings of the Design, Automation and Test in Europe, 2009
Analysis and optimization of faulttolerant embedded systems with hardened processors.
Proceedings of the Design, Automation and Test in Europe, 2009
Qualitydriven synthesis of embedded multimode control systems.
Proceedings of the 46th Design Automation Conference, 2009
Online thermal aware dynamic voltage scaling for energy optimization with frequency/temperature dependency consideration.
Proceedings of the 46th Design Automation Conference, 2009
A standbysparing technique with low energyoverhead for faulttolerant hard realtime systems.
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009
2008
Task mapping and priority assignment for soft realtime applications under deadline miss ratio constraints.
ACM Trans. Embedded Comput. Syst., 2008
Timing analysis of the FlexRay communication protocol.
RealTime Systems, 2008
Analysis and Optimisation of Hierarchically Scheduled Multiprocessor Embedded Systems.
International Journal of Parallel Programming, 2008
Model validation for embedded systems using formal methodaided simulation.
IET Computers & Digital Techniques, 2008
ThermalAware SoC Test Scheduling with Test Set Partitioning and Interleaving.
J. Electronic Testing, 2008
Predictable Implementation of RealTime Applications on Multiprocessor SystemsonChip.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
Synthesis of Flexible FaultTolerant Schedules with Preemption for Mixed Soft and Hard RealTime Systems.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
TemperatureAware Task Mapping for Energy Optimization with Dynamic Voltage Scaling.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008
A Simulation Methodology for WorstCase Response Time Estimation of Distributed RealTime Systems.
Proceedings of the Design, Automation and Test in Europe, 2008
TestArchitecture Optimization and Test Scheduling for SOCs with CoreLevel Expansion of Compressed Test Patterns.
Proceedings of the Design, Automation and Test in Europe, 2008
Scheduling of FaultTolerant Embedded Systems with Soft and Hard Timing Constraints.
Proceedings of the Design, Automation and Test in Europe, 2008
Synthesis of FaultTolerant Embedded Systems.
Proceedings of the Design, Automation and Test in Europe, 2008
TemperatureAware Voltage Selection for Energy Optimization.
Proceedings of the Design, Automation and Test in Europe, 2008
SimulationDriven ThermalSafe Test Time Minimization for SystemonChip.
Proceedings of the 17th IEEE Asian Test Symposium, 2008
2007
Energy Optimization of Multiprocessor Systems on Chip by Voltage Selection.
IEEE Trans. VLSI Syst., 2007
Faultaware Communication Mapping for NoCs with Guaranteed Latency.
International Journal of Parallel Programming, 2007
Formal verification of componentbased designs.
Design Autom. for Emb. Sys., 2007
Bus Access Optimization for Predictable Implementation of RealTime Applications on Multiprocessor SystemsonChip.
Proceedings of the 28th IEEE RealTime Systems Symposium (RTSS 2007), 2007
What impacts course evaluation?
Proceedings of the 12th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, 2007
A heuristic for thermalsafe SoC test scheduling.
Proceedings of the 2007 IEEE International Test Conference, 2007
Transactorbased Formal Verification of Realtime Embedded Systems.
Proceedings of the Forum on specification and Design Languages, 2007
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007
Bus access optimisation for FlexRaybased distributed embedded systems.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Optimized integration of test compression and sharing for SOC testing.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Scheduling and voltage scaling for energy/reliability tradeoffs in faulttolerant timetriggered embedded systems.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007
Realtime applications with stochastic task execution times  analysis and optimisation.
Springer, ISBN: 9781402055058, 2007
2006
QuasiStatic Assignment of Voltages and Optional Cycles in ImpreciseComputation Systems With Energy Considerations.
IEEE Trans. VLSI Syst., 2006
Analysis and optimization of distributed realtime embedded systems.
ACM Trans. Design Autom. Electr. Syst., 2006
Dual Flow Nets: Modeling the control/dataflow relation in embedded systems.
ACM Trans. Embedded Comput. Syst., 2006
Test Time Minimization for Hybrid BIST of CoreBased Systems.
J. Comput. Sci. Technol., 2006
A QuasiStatic Approach to Minimizing Energy Consumption in RealTime Systems under Reward Constraints.
Proceedings of the 12th IEEE Conference on Embedded and RealTime Computing Systems and Applications (RTCSA 2006), 2006
Mapping of FaultTolerant Applications with Transparency on Distributed Embedded Systems*.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
Synthesis of FaultTolerant Embedded Systems with Checkpointing and Replication.
Proceedings of the Third IEEE International Workshop on Electronic Design, 2006
Buffer space optimisation with communication synthesis and traffic shaping for NoCs.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Formal verification of systemc designs using a petrinet based representation.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Synthesis of faulttolerant schedules with transparency/performance tradeoffs for distributed embedded systems.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Power constrained and defectprobability driven SoC test scheduling with test set partitioning.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
Schedulabilitydriven frame packing for multicluster distributed embedded systems.
ACM Trans. Embedded Comput. Syst., 2005
Cosynthesis of energyefficient multimode embedded systems with consideration of modeexecution probabilities.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2005
A WiringAware Approach to Minimizing BuiltIn SelfTest Overhead.
J. Comput. Sci. Technol., 2005
Optimization of Hierarchically Scheduled Heterogeneous Embedded Systems.
Proceedings of the 11th IEEE International Conference on Embedded and RealTime Computing Systems and Applications (RTCSA 2005), 2005
QuasiStatic Scheduling for Multiprocessor RealTime Systems with Hard and Soft Tasks.
Proceedings of the 11th IEEE International Conference on Embedded and RealTime Computing Systems and Applications (RTCSA 2005), 2005
PowerComposition Profile Driven CoSynthesis with Power Management Selection for Dynamic and Leakage Energy Reduction.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005
Optimization of a Busbased Test Data Transportation Mechanism in SystemonChip.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005
Validation of Embedded Systems Using Formal Method Aided Simulation.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005
PowerConstrained Hybrid BIST Test Scheduling in an AbortonFirstFail Test Environment.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005
Design Optimization of Timeand CostConstrained FaultTolerant Distributed Embedded Systems.
Proceedings of the 2005 Design, 2005
QuasiStatic Voltage Scaling for Energy Minimization with Time Constraints.
Proceedings of the 2005 Design, 2005
Fault and energyaware communication mapping with guaranteed latency for applications implemented on NoC.
Proceedings of the 42nd Design Automation Conference, 2005
Quasistatic assignment of voltages and optional cycles for maximizing rewards in realtime systems with energy constraints.
Proceedings of the 42nd Design Automation Conference, 2005
SOC Test Scheduling with Test Set Sharing and Broadcasting.
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005
2004
Scheduling and mapping in an incremental design methodology for distributed realtime embedded systems.
IEEE Trans. VLSI Syst., 2004
Iterative schedule optimization for voltage scalable distributed embedded systems.
ACM Trans. Embedded Comput. Syst., 2004
Schedulability analysis of applications with stochastic task execution times.
ACM Trans. Embedded Comput. Syst., 2004
SchedulabilityDriven Communication Synthesis for Time Triggered Embedded Systems.
RealTime Systems, 2004
Guest Editors' Introduction: Designing RealTime Embedded Multimedia Systems.
IEEE Design & Test of Computers, 2004
Optimization of Soft RealTime Systems with Deadline Miss Ratio Constraints.
Proceedings of the 10th IEEE RealTime and Embedded Technology and Applications Symposium (RTAS 2004), 2004
Simultaneous communication and processor voltage scaling for dynamic and leakage energy reduction in timeconstrained systems.
Proceedings of the 2004 International Conference on ComputerAided Design, 2004
A Formal Verification Approach for IPbased Designs.
Proceedings of the Forum on specification and Design Languages, 2004
SchedulabilityDriven Partitioning and Mapping for MultiCluster RealTime Systems.
Proceedings of the 16th Euromicro Conference on RealTime Systems (ECRTS 2004), 30 June, 2004
A Heuristic for WiringAware BuiltIn SelfTest Synthesis.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004
A Formal Verification Methodology for IPbased Designs.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004
Static Scheduling of Monoprocessor RealTime Systems composed of Hard and Soft Tasks.
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004
Design Optimization of MultiCluster Embedded Systems for RealTime Application.
Proceedings of the 2004 Design, 2004
QuasiStatic Scheduling for RealTime Systems with Hard and Soft Tasks.
Proceedings of the 2004 Design, 2004
OverheadConscious Voltage Selection for Dynamic and Leakage Energy Reduction of TimeConstrained Systems.
Proceedings of the 2004 Design, 2004
Hybrid BIST Test Scheduling Based on Defect Probabilities.
Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004
Analysis and synthesis of distributed realtime embedded systems.
Springer, ISBN: 9781402028724, 2004
Systemlevel design techniques for energyefficient embedded systems.
Springer, ISBN: 9781402077500, 2004
2003
Modeling and formal verification of embedded systems based on a Petri net representation.
Journal of Systems Architecture, 2003
Schedulabilitydriven frame packing for multicluster distributed embedded systems.
Proceedings of the 2003 Conference on Languages, 2003
Schedulability Analysis for Distributed Heterogeneous Time/Event Triggered RealTime Systems.
Proceedings of the 15th Euromicro Conference on RealTime Systems (ECRTS 2003), 2003
Buffer and Controller Minimisation for TimeConstrained Testing of SystemOnChip.
Proceedings of the 18th IEEE International Symposium on Defect and FaultTolerance in VLSI Systems (DFT 2003), 2003
Hybrid BIST Time Minimization for CoreBased Systems with STUMPS Architecture.
Proceedings of the 18th IEEE International Symposium on Defect and FaultTolerance in VLSI Systems (DFT 2003), 2003
Scheduling and Mapping of Conditional Task Graphs for the Synthesis of Low Power Embedded Systems.
Proceedings of the 2003 Design, 2003
A CoDesign Methodology for EnergyEfficient MultiMode Embedded Systems with Consideration of Mode Execution Probabilities.
Proceedings of the 2003 Design, 2003
Schedulability Analysis and Optimization for the Synthesis of MultiCluster Distributed Embedded Systems.
Proceedings of the 2003 Design, 2003
Design optimization of mixed time/eventtriggered distributed embedded systems.
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003
2002
Synthesizing EnergyEfficient Embedded Systems with LOPOCOS.
Design Autom. for Emb. Sys., 2002
Editorial.
Design Autom. for Emb. Sys., 2002
Formal Verification in a ComponentBased Reuse Methodology.
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002
Schedulability analysis of multiprocessor realtime applications with stochastic task execution times.
Proceedings of the 2002 IEEE/ACM International Conference on Computeraided Design, 2002
EnergyEfficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems.
Proceedings of the 2002 Design, 2002
Symbolic model checking of Dual Transition Petri Nets.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002
Holistic scheduling and analysis of mixed time/eventtriggered distributed embedded systems.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002
2001
SOCWARE: A New Swedish Design Cluster for SystemonChip.
Proceedings of the 2001 International Conference on Microelectronics Systems Education, 2001
Memory and TimeEfficient Schedulability Analysis of Task Sets with Stochastic Execution Time.
Proceedings of the 13th Euromicro Conference on RealTime Systems (ECRTS 2001), 2001
Hierarchical Modeling and Verification of Embedded Systems.
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (EuroDSD 2001), 2001
An Approach to Incremental Design of Distributed Embedded Systems.
Proceedings of the 38th Design Automation Conference, 2001
Minimizing system modification in an incremental design approach.
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001
2000
Scheduling with bus access optimization for distributed embedded systems.
IEEE Trans. VLSI Syst., 2000
Verification of Embedded Systems using a Petri Net based Representation.
Proceedings of the 13th International Symposium on System Synthesis, 2000
Modeling of RealTime Embedded Systems in an ObjectOriented Design Environment with UML.
Proceedings of the 3rd International Symposium on ObjectOriented RealTime Distributed Computing (ISORC 2000), 2000
Definitions of Equivalence for Transformational Synthesis of Embedded Systems.
Proceedings of the 6th International Conference on Engineering of Complex Computer Systems (ICECCS 2000), 2000
Formal Coverification of Embedded Systems Using Model Checking.
Proceedings of the 26th EUROMICRO 2000 Conference, 2000
Schedulability analysis for systems with data and control dependencies.
Proceedings of the 12th Euromicro Conference on RealTime Systems (ECRTS 2000), 2000
Bus Access Optimization for Distributed Embedded Systems Based on Schedulability Analysis.
Proceedings of the 2000 Design, 2000
Performance estimation for embedded systems with data and control dependencies.
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000
1999
An Improved Scheduling Technique for TimeTriggered Embedded Systems.
Proceedings of the 25th EUROMICRO '99 Conference, 1999
Scheduling with optimized communication for timetriggered embedded systems.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999
1998
Scheduling under data and control dependencies for heterogeneous architectures.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems.
Proceedings of the 24th EUROMICRO '98 Conference, 1998
Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems.
Proceedings of the 1998 Design, 1998
1997
Postsynthesis backannotation of timing information in behavioral VHDL.
Journal of Systems Architecture, 1997
System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search.
Design Autom. for Emb. Sys., 1997
1996
Synthesis of systems specified as interacting VHDL processes.
Integration, 1996
Hardware/Software Partitioning with Iterative Improvement Heuristics.
Proceedings of the 9th International Symposium on System Synthesis, 1996
Automatic Parallelization of a Petri NetBased Design Representation for HighLevel Synthesis.
Proceedings of the 22rd EUROMICRO Conference '96, 1996
Hardware/software partitioning of VHDL system specifications.
Proceedings of the conference on European design automation, 1996
1995
Timing constraint specification and synthesis in behavioral VHDL.
Proceedings of the Proceedings EURODAC'95, 1995
1994
Synthesis of VHDL concurrent processes.
Proceedings of the Proceedings EURODAC'94, 1994
VHDL systemlevel specification and partitioning in a hardware/software cosynthesis environment.
Proceedings of the Third International Workshop on Hardware/Software Codesign, 1994
1992
Compiling VHDL into a highlevel synthesis design representation.
Proceedings of the conference on European design automation, 1992