Aidong Zhao
Orcid: 0000-0003-3512-0320
According to our database1,
Aidong Zhao
authored at least 8 papers
between 2023 and 2025.
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Bibliography
2025
VTSMOC: An Efficient Voronoi Tree Search Boosted Multiobjective Bayesian Optimization With Constraints for High-Dimensional Analog Circuit Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2025
2024
ROI-HIT: Region of Interest-Driven High-Dimensional Microarchitecture Design Space Exploration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2024
D<sup>3</sup>PBO: Dynamic Domain Decomposition-based Parallel Bayesian Optimization for Large-scale Analog Circuit Sizing.
ACM Trans. Design Autom. Electr. Syst., May, 2024
BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2024
Proceedings of the Uncertainty in Artificial Intelligence, 2024
Revisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024
A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation : (Invited Paper).
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023