Yangfeng Su
Orcid: 0000-0002-8744-1591
According to our database1,
Yangfeng Su
authored at least 51 papers
between 1998 and 2024.
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Bibliography
2024
J. Sci. Comput., March, 2024
2023
Unleashing the Power of Graph Spectral Sparsification for Power Grid Analysis via Incomplete Cholesky Factorization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023
Correlated Bayesian Model Fusion: Efficient High-Dimensional Performance Modeling of Analog/RF Integrated Circuits Over Multiple Corners.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023
2D Eigenvalue Problem III: Convergence Analysis of the 2D Rayleigh Quotient Iteration.
CoRR, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Fast Statistical Analysis of Rare Failure Events With Truncated Normal Distribution in High-Dimensional Variation Space.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Numer. Linear Algebra Appl., 2022
2021
Bayesian Inference on Introduced General Region: An Efficient Parametric Yield Estimation Method for Integrated Circuits.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2020
ACM Trans. Design Autom. Electr. Syst., 2020
Efficient Statistical Analysis for Correlated Rare Failure Events via Asymptotic Probability Approximation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Efficient Rare Failure Analysis Over Multiple Corners via Correlated Bayesian Inference.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
CoRR, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Multi-Corner Parametric Yield Estimation via Bayesian Inference on Bernoulli Distribution with Conjugate Prior.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Graph-Constrained Sparse Performance Modeling for Analog Circuit Optimization via SDP Relaxation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
Efficient Performance Trade-off Modeling for Analog Circuit based on Bayesian Neural Network.
Proceedings of the International Conference on Computer-Aided Design, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
2018
Smart-MSP: A Self-Adaptive Multiple Starting Point Optimization Approach for Analog Circuit Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
2016
Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits Via Hidden Markov Tree.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Efficient Hybrid Performance Modeling for Analog Circuits Using Hierarchical Shrinkage Priors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
SIAM J. Matrix Anal. Appl., 2016
Fast compressive sensing reconstruction algorithm on FPGA using Orthogonal Matching Pursuit.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Efficient statistical analysis for correlated rare failure events via asymptotic probability approximation.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Proceedings of the 14th International Conference on Computer-Aided Design and Computer Graphics, 2015
2014
SIAM J. Matrix Anal. Appl., 2014
2012
Appl. Math. Comput., 2012
AMOR: an efficient aggregating based model order reduction method for many-terminal interconnect circuits.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
2011
SIAM J. Matrix Anal. Appl., 2011
2010
NHAR: A non-homogeneous Arnoldi method for fast simulation of RCL circuits with a large number of ports.
Int. J. Circuit Theory Appl., 2010
Stochastic Sparse-Grid Collocation Algorithm for Steady-State Analysis of Nonlinear System with Process Variations.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010
An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits.
Proceedings of the Design, Automation and Test in Europe, 2010
2008
Model Order Reduction of Parameterized Interconnect Networks via a Two-Directional Arnoldi Process.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
2007
RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Stochastic Sparse-grid Collocation Algorithm (SSCA) for Periodic Steady-State Analysis of Nonlinear System with Process Variations.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
2006
The second-order biorthogonalization procedure and its application to quadratic eigenvalue problems.
Appl. Math. Comput., 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
Dimension Reduction of Large-Scale Second-Order Dynamical Systems via a Second-Order Arnoldi Method.
SIAM J. Sci. Comput., 2005
SOAR: A Second-order Arnoldi Method for the Solution of the Quadratic Eigenvalue Problem.
SIAM J. Matrix Anal. Appl., 2005
Block SAPOR: block Second-order Arnoldi method for Passive Order Reduction of multi-input multi-output RCS interconnect circuits.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
2003
An error distribution based nonlinear companding method for analog behavioral modeling via wavelet approximation.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
An efficient Sylvester equation solver for time domain circuit simulation by wavelet collocation method.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2001
Convergence of Pseudocontractions and Applications to Two-stage and Asynchronous Multisplitting for Singular <i>M</i>-Matrices.
SIAM J. Matrix Anal. Appl., 2001
1998
IEEE Trans. Signal Process., 1998