Ajith Sivadhasan Ramani

According to our database, Ajith Sivadhasan Ramani authored at least 3 papers in 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

A Differential Push-Pull Voltage Mode VCSEL Driver in 65-nm CMOS.

Ajith Sivadhasan Ramani, Spoorthi Nayak, Sudip Shekhar

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 10-Gb/s -18.8 dBm Sensitivity 5.7 mW Fully-Integrated Optoelectronic Receiver With Avalanche Photodetector in 0.13- $\mu$ m CMOS.

Spoorthi Nayak, Abdelrahman H. Ahmed, Ahmad Sharkia, Ajith Sivadhasan Ramani, Shahriar Mirabbasi, Sudip Shekhar

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

An Integrated Discrete-Time Delay-Compensating Technique for Large-Array Beamformers.

Erfan Ghaderi, Ajith Sivadhasan Ramani, Arya A. Rahimi, Deukhyoun Heo, Sudip Shekhar, Subhanshu Gupta

IEEE Trans. Circuits Syst. I Regul. Pap., 2019