Subhanshu Gupta

Orcid: 0000-0003-4754-3451

According to our database1, Subhanshu Gupta authored at least 42 papers between 2005 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2023
Design Considerations of Time-Interleaved Discrete-Time Beamformers Toward Wideband Communications.
IEEE Trans. Circuits Syst. II Express Briefs, November, 2023

Low-Power Process and Temperature-Invariant Constant Slope-and-Swing Ramp-Based Phase Interpolator.
IEEE J. Solid State Circuits, 2023

Common-Mode Drift Resilient Ring-Oscillator-Based Time-Domain Filter for Next-Generation Wireless.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

A Review of CMOS Non-Foster Circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A Switching-Less True-Time-Delay-Based Beam Probing Approach for Ultra-Low Latency Wireless Communications: System Analysis and Demonstration.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 0.22-μW Single-Bit VCO-Based Time-Domain Sensor-to-Digital Front-End With Reduced Supply Sensitivity.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Multi-Mode Spatial Signal Processor With Rainbow-Like Fast Beam Training and Wideband Communications Using True-Time-Delay Arrays.
IEEE J. Solid State Circuits, 2022

2021
Neural-Network Based Self-Initializing Algorithm for Multi-Parameter Optimization of High-Speed ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

A 197.1-μW Wireless Sensor SoC With an Energy-Efficient Analog Front-End and a Harmonic Injection-Locked OOK TX.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Fast Beam Training With True-Time-Delay Arrays in Wideband Millimeter-Wave Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A Four-Element 500-MHz 40-mW 6-bit ADC-Enabled Time-Domain Spatial Signal Processor.
IEEE J. Solid State Circuits, 2021

Wideband Beamforming with Rainbow Beam Training using Reconfigurable True-Time-Delay Arrays for Millimeter-Wave Wireless.
CoRR, 2021

A 4-Element 800MHz-BW 29mW True-Time-Delay Spatial Signal Processor Enabling Fast Beam-Training with Data Communications.
Proceedings of the 47th ESSCIRC 2021, 2021

2020
Spur Minimization Techniques for Ultra-Low-Power Injection-Locked Transmitters.
IEEE Trans. Circuits Syst., 2020

Low-Latency Reconfigurable Entropy Digital True Random Number Generator With Bias Detection and Correction.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

Design of Millimeter-Wave Single-Shot Beam Training for True-Time-Delay Array.
Proceedings of the 21st IEEE International Workshop on Signal Processing Advances in Wireless Communications, 2020

10.8 A 4-Element 500MHz-Modulated-BW 40mW 6b 1GS/s Analog-Time-to-Digital-Converter-Enabled Spatial Signal Processor in 65nm CMOS.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

A 2Vpk-pk, diff Input Range 1GS/s Voltage-to-Time Converter with Tunable Distortion Compensation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Experimental Testbed for Ultrasonic Wireless Power Transfer and Backscattering Based Localization for Future Implantable Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
From Battery Enabled to Natural Harvesting: Enzymatic BioFuel Cell Assisted Integrated Analog Front-End in 130nm CMOS for Long-Term Monitoring.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

An Integrated Discrete-Time Delay-Compensating Technique for Large-Array Beamformers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 25.6μW 8.97ps Period Jitter Phase-Locked Relaxation Oscillator with sub-1µS Start-Up for Low-Power IoT.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
A Hybrid ΔΣ/Nyquist Rate Switched Capacitor Power Amplifier in 65nm CMOS.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Energy-Efficient Serialized Walsh-Hadamard Transform Based Feature-Extraction for Information-Aware Compressive Sensing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A 3.51µW 0.31µVrms Biofuel Cell Enabled Integrated Analog CMOS Front-End in 130 nm CMOS.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

2017
Frequency-Channelized Mismatch-Shaped Quadrature Data Converters for Carrier Aggregation in MU-MIMO LTE-A.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A compressive sensing information aware analog front end for IoT sensors using adaptive clocking techniques.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Precise Placement of Precordial Electrodes with +/-0.5 cm Accuracy for Recording ECG in Self-operable Diagnostic Devices.
Proceedings of the Advances in Human Factors and Ergonomics in Healthcare and Medical Devices, 2017

2016
A highly linear 4GS/s uncalibrated voltage-to-time converter with wide input range.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

An 143nW relaxation oscillator for ultra-low power biomedical systems.
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016

Lomb algorithm versus fast fourier transform in heart rate variability analyses of pain in premature infants.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

Synchronous multi-signal acquisition for WBSNs using gold-code based joint-compressive sensing.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

2015
DAC mismatch shaping for quadrature sigma-delta data converters.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2014
Compressed Sensing Analog Front-End for Bio-Sensor Applications.
IEEE J. Solid State Circuits, 2014

2012
Multi-rate Polyphase DSP and LMS Calibration Schemes for Oversampled ADCs.
J. Signal Process. Syst., 2012

A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS.
IEEE J. Solid State Circuits, 2012

2011
Multi-rate polyphase DSP and LMS calibration schemes for oversampled data conversion systems.
Proceedings of the IEEE International Conference on Acoustics, 2011

2010
A Mode-I/Mode-III UWB LNA with programmable gain and 20 dB WLAN blocker rejection in 130nm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2008
Cascaded Complex ADCs With Adaptive Digital Calibration for I/Q Mismatch.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Hybrid modeling techniques for low OSR cascade continuous-time SigmaDelta modulators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
A Digital-Summing Feedforward Sigma-Delta Modulator and its Application to a Cascade ADC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005
Design considerations for a 10 GHz CMOS transmit-receive switch.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005


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