Akhilesh Tyagi

Cryptogr., March, 2024

2023

Block-Active ADMM to Minimize NMF with Bregman Divergences.

[BibT_eX]

[DOI]

Xinyao Li

Sensors, August, 2023

A Side-Channel Evaluation of On-chip Vdd Distribution Network with Decoupling Capacitance.

[BibT_eX]

[DOI]

SN Comput. Sci., 2023

Huffman Cache Trails.

[BibT_eX]

[DOI]

Ananda Biswas

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

2022

Performance Counters and DWT Enabled Control Flow Integrity.

[BibT_eX]

[DOI]

Ananda Biswas

Zelong Li

SN Comput. Sci., 2022

An Evaluation of Power Side-Channel Resistance for RNS Secure Logic.

[BibT_eX]

[DOI]

Sensors, 2022

Cross-World Covert Channel on ARM Trustzone through PMU.

[BibT_eX]

[DOI]

Xinyao Li

Sensors, 2022

Continuous Nonintrusive Mobile Device Soft Keyboard Biometric Authentication.

[BibT_eX]

[DOI]

Ian Richardson

Cryptogr., 2022

Transient State Signaling for Spectre/Meltdown Transient Cache Side-channel Prevention.

[BibT_eX]

[DOI]

Zelong Li

Proceedings of the 19th International Conference on Security and Cryptography, 2022

2021

An FPGA Implementation of Privacy Preserving Data Provenance Model Based on PUF for Secure Internet of Things.

[BibT_eX]

[DOI]

SN Comput. Sci., 2021

Message Integrity and Authenticity in Secure CAN.

[BibT_eX]

[DOI]

IEEE Consumer Electron. Mag., 2021

Multi-Granularity Control Flow Anomaly Detection with Hardware Counters.

[BibT_eX]

[DOI]

Proceedings of the 7th IEEE World Forum on Internet of Things, 2021

Power Distribution Network Capacitive Decoupling for Side-Channel Resistance.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

2020

User-Silicon Entangled Mobile Identity Authentication.

[BibT_eX]

[DOI]

J. Hardw. Syst. Secur., 2020

Secure CAN for Connected Vehicles.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE World Forum on Internet of Things, 2020

Instruction Level Disassembly through Electromagnetic Side-Chanel: Machine Learning Classification Approach with Reduced Combinatorial Complexity.

[BibT_eX]

[DOI]

V. M. Vaidyan

Proceedings of the SPML 2020: 3rd International Conference on Signal Processing and Machine Learning, 2020

Control Flow Integrity in IoT Devices with Performance Counters and DWT.

[BibT_eX]

[DOI]

Ananda Biswas

Zelong Li

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2020

Probabilistic Verification of Outsourced Computation Based on Novel Reversible PUFs.

[BibT_eX]

[DOI]

Abdallah M. Almomani

Proceedings of the Service-Oriented and Cloud Computing, 2020

2019

Continuous Transparent Mobile Device Touchscreen Soft Keyboard Biometric Authentication.

[BibT_eX]

[DOI]

Ian Richardson

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Privacy Preserving Data Provenance Model Based on PUF for Secure Internet of Things.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019

Physical Unclonable Functions (PUFs) Entangled Trusted Computing Base.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019

2018

Barrel Shifter Physical Unclonable Function Based Encryption.

[BibT_eX]

[DOI]

Cryptogr., 2018

Power Side Channel Resistance of RNS Secure Logic.

[BibT_eX]

[DOI]

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Variation Enhancement of Arbiter PUFs with Asymmetric Layout.

[BibT_eX]

[DOI]

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Multi-block APUF with 2-Level Voltage Supply.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

2017

Voice-Based User-Device Physical Unclonable Functions for Mobile Device Authentication.

[BibT_eX]

[DOI]

J. Hardw. Syst. Secur., 2017

Shaping data for application performance and energy optimization in dynamic data view framework.

[BibT_eX]

[DOI]

Varun Venkatesan

Integr., 2017

Area, energy, and time assessment for a distributed TPM for distributed trust in IoT clusters.

[BibT_eX]

[DOI]

Soma Chaudhuri

Integr., 2017

Using Power Clues to Hack IoT Devices: The power side channel provides for instruction-level disassembly.

[BibT_eX]

[DOI]

IEEE Consumer Electron. Mag., 2017

2016

Energy Complexity of Optical Computations.

[BibT_eX]

[DOI]

John H. Reif

Int. J. Unconv. Comput., 2016

Security Metrics for Power Based SCA Resistant Hardware Implementation.

[BibT_eX]

[DOI]

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

2015

Dynamic Data Shapers Optimize Performance in Dynamic Binary Optimization (DBO) Environment.

[BibT_eX]

[DOI]

Varun Venkatesan

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2015

Characterizing Composite User-Device Touchscreen Physical Unclonable Functions (PUFs) for Mobile Device Authentication.

[BibT_eX]

[DOI]

Ryan A. Scheel

Proceedings of the 5th International Workshop on Trustworthy Embedded Devices, 2015

2014

A placer for composable FPGA with 2D mesh network.

[BibT_eX]

[DOI]

Int. J. Embed. Syst., 2014

User satisfaction aware routing and energy modeling of polymorphic network on chip architecture.

[BibT_eX]

[DOI]

Comput. Electr. Eng., 2014

t-Private Systems: Unified Private Memories and Computation.

[BibT_eX]

[DOI]

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2014

Towards Making Private Circuits Practical: DPA Resistant Private Circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Glitch Resistant Private Circuits Design Using HORNS.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

An Evaluation of User Satisfaction Driven Scheduling in a Polymorphic Embedded System.

[BibT_eX]

[DOI]

Zhang Zhang

Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

2013

PolyNOC - A polymorphic thread simulator for NoC communication based embedded systems.

[BibT_eX]

[DOI]

Zhang Zhang

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

User satisfaction aware routing decisions in NOC.

[BibT_eX]

[DOI]

Proceedings of the Network on Chip Architectures, 2013

2012

A Novel Design of Secure and Private Circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

t-Private logic synthesis on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 2012

2011

Partial reconfiguration logic synthesis by temporal slicing.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

HORNS: A homomorphic encryption scheme for Cloud Computing using Residue Number System.

[BibT_eX]

[DOI]

Kamesh Namuduri

Proceedings of the 45st Annual Conference on Information Sciences and Systems, 2011

A novel thread scheduler design for polymorphic embedded systems.

[BibT_eX]

[DOI]

Viswanath Krishnamurthy

Proceedings of the 14th International Conference on Compilers, 2011

2010

State Space Reconfigurability: A Low Energy Implementation Architecture for Self Modifying Finite Automata.

[BibT_eX]

[DOI]

J. Low Power Electron., 2010

Preventing IC Piracy Using Reconfigurable Logic Barriers.

[BibT_eX]

[DOI]

Alex Baumgarten

Joseph Zambreno

IEEE Des. Test Comput., 2010

2009

Relating Boolean gate truth tables to one-way functions.

[BibT_eX]

[DOI]

Integr. Comput. Aided Eng., 2009

Breaking adaptive multicast deadlock by virtual channel address/data FIFO decoupling.

[BibT_eX]

[DOI]

Proceedings of the Second International Workshop on Network on Chip Architectures, 2009

2008

REBEL - Reconfigurable Block Encryption Logic.

[BibT_eX]

Proceedings of the SECRYPT 2008, 2008

Self Modifying Finite Automata (SMFA) based state machine implementation for lower energy.

[BibT_eX]

[DOI]

Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008

2007

A Novel Charge Recycling Design Scheme Based on Adiabatic Charge Pump.

[BibT_eX]

[DOI]

Vineela Manne

IEEE Trans. Very Large Scale Integr. Syst., 2007

2006

Architecture Support for 3D Obfuscation.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2006

WARM SRAM: A Novel Scheme to Reduce Static Leakage Energy in SRAM Arrays.

[BibT_eX]

[DOI]

J. Low Power Electron., 2006

SRAM CP: A Charge Recycling Design Schema for SRAM.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

State space reconfigurability: an implementation architecture for self modifying finite automata.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Compilers, 2006

2005

Energy-Privacy Trade-Offs in VLSI Computations.

[BibT_eX]

[DOI]

Proceedings of the Progress in Cryptology, 2005

Arc3D: A 3D Obfuscation Architecture.

[BibT_eX]

[DOI]

Proceedings of the High Performance Embedded Architectures and Compilers, 2005

TIVA: Trusted Integrity Verification Architecture.

[BibT_eX]

[DOI]

Proceedings of the Digital Rights Management: Technologies, 2005

Software Tamper Resistance Through Dynamic Program Monitoring.

[BibT_eX]

[DOI]

Brian Blietz

Proceedings of the Digital Rights Management: Technologies, 2005

Control flow based obfuscation.

[BibT_eX]

[DOI]

Jun Ge

Soma Chaudhuri

Proceedings of the Fifth ACM Workshop on Digital Rights Management, 2005

An Integrated Partitioning and Scheduling Based Branch Decoupling.

[BibT_eX]

[DOI]

Pramod Ramarao

Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

2004

Protection against Indirect Overflow Attacks on Pointers.

[BibT_eX]

[DOI]

Ge Zhu

Proceedings of the Second IEEE International Workshop on Information Assurance (IWIA'04), 2004

IPC Driven Dynamic Associative Cache Architecture for Low Energy.

[BibT_eX]

[DOI]

Sriram Nadathur

Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004

2003

Intermediate processing protocol for processing within IP-routed networks.

[BibT_eX]

[DOI]

Sonal Pandey

Microprocess. Microsystems, 2003

An Adiabatic Charge Pump Based Charge Recycling Design Style.

[BibT_eX]

[DOI]

Vineela Manne

Proceedings of the Integrated Circuit and System Design, 2003

Run-Time Support for Detection of Memory Access Violations to Prevent Buffer Overflow Exploits.

[BibT_eX]

[DOI]

Pramod Ramarao

Proceedings of the Information Security, 6th International Conference, 2003

A Dependence Driven Efficient Dispatch Scheme.

[BibT_eX]

[DOI]

Sriram Nadathur

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

An Adiabatic Framework for a Low Energy µ-Architecture & Compiler.

[BibT_eX]

[DOI]

Pramod Ramarao

Proceedings of the 7th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-7 2003), 2003

2002

Adaptive Balanced Computing (ABC) Microprocessor Using Reconfigurable Functional Caches (RFCs).

[BibT_eX]

[DOI]

Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

A reliable protocol for processing within IP-routed networks.

[BibT_eX]

[DOI]

Sonal Pandey

Proceedings of the 11th International Conference on Computer Communications and Networks, 2002

2001

Integrated Area-power Optimal State Assignment.

[BibT_eX]

[DOI]

VLSI Design, 2001

A reconfigurable multifunction computing cache architecture.

[BibT_eX]

[DOI]

Vadhiraj Sankaranarayanan

IEEE Trans. Very Large Scale Integr. Syst., 2001

A Hierarchical Dependence Check and Folded Rename Mapping Based Scalable Dispatch Stage.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

Evaluation of Reconfigurable Cache Module Architecture.

[BibT_eX]

[DOI]

Abhishek Singhal

Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

2000

A compiler optimization paradigm for dynamic energy management.

[BibT_eX]

[DOI]

SIGARCH Comput. Archit. News, 2000

Instruction-level Distributed Microarchitecture Based on Data Decoupling.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

A Trace Based Evaluation of Speculative Branch Decoupling.

[BibT_eX]

[DOI]

Anshuman S. Nadkarni

Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Encoded Program Counter: Self-Protection from Buffer Overflow Attacks.

[BibT_eX]

Proceedings of the International Conference on Internet Computing, 2000

A reconfigurable multi-function computing cache architecture.

[BibT_eX]

[DOI]

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2000

1999

Dynamic Branch Decoupled Architecture.

[BibT_eX]

[DOI]

Hon-Chi Ng

Prasant Mohapatra

Proceedings of the IEEE International Conference On Computer Design, 1999

Configuration Caching Vs Data Caching for Striped FPGAs.

[BibT_eX]

[DOI]

Deepali Deshpande

Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999

On Reconfiguring Cache for Computing.

[BibT_eX]

[DOI]

Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

Hybrid Data/Configuration Caching for Striped FPGAs.

[BibT_eX]

[DOI]

Deepali Deshpande

Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

1998

Three-dimensional defect sensitivity modeling for open circuits in ULSI structures.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1997

Statistical Module Level Area and Delay Estimation.

[BibT_eX]

[DOI]

VLSI Design, 1997

Minimizing interconnect energy through integrated low-power placement and combinational logic synthesis.

[BibT_eX]

[DOI]

Glenn Holt

Proceedings of the 1997 International Symposium on Physical Design, 1997

Low power FSM design using Huffman-style encoding.

[BibT_eX]

[DOI]

Prasoon Surti

Liang-Fang Chao

Proceedings of the European Design and Test Conference, 1997

1996

Entropic bounds on FSM switching.

[BibT_eX]

[DOI]

Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

1995

Re-encoding for low power state assignment of FSMs.

[BibT_eX]

[DOI]

Vamshi Veeramachaneni

Suresh Rajgopal

Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995

EPNR: an energy-efficient automated layout synthesis package.

[BibT_eX]

[DOI]

Glenn Holt

Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

1994

Parameterized Modeling of Open-Circuit Critical Volume for Three-Dimensional Defects in VLSI Processing.

[BibT_eX]

[DOI]

Proceedings of the Seventh International Conference on VLSI Design, 1994

1993

A Reduced-Area Scheme for Carry-Select Adders.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1993

A Module Generator Development Environment: Area Estimation and Design-Space Exploration Encapsulation.

[BibT_eX]

[DOI]

Proceedings of the Sixth International Conference on VLSI Design, 1993

Parallel Implementation of a Cut and Paste Maze Routing Algorithm.

[BibT_eX]

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1992

Image segmentation on a 2D array by a directed split and merge procedure.

[BibT_eX]

[DOI]

Magdy A. Bayoumi

IEEE Trans. Signal Process., 1992

VLSI design parsing (preliminary version).

[BibT_eX]

[DOI]

Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

1991

On probabilistic switch-level simulation for asynchronous circuits.

[BibT_eX]

[DOI]

Suresh Rajgopal

Proceedings of the conference on European design automation, 1991

1990

An area estimation technique for module generation.

[BibT_eX]

[DOI]

Arun Rajanala

Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

Efficient Parallel Algorithms for Optical Computing with the DFT Primitive.

[BibT_eX]

[DOI]

John H. Reif

Proceedings of the Foundations of Software Technology and Theoretical Computer Science, 1990

An algebraic model for design space with applications to function module generation.

[BibT_eX]

[DOI]

Proceedings of the European Design Automation Conference, 1990

1989

Energy-Time Trade-offs in VLSI Computation.

[BibT_eX]

[DOI]