Alyssa B. Apsel

Orcid: 0000-0001-9199-2292

Affiliations:
  • Cornell University, School of Electrical and Computer Engineering, Ithaca, NY, USA
  • Johns Hopkins University, Baltimore, MD, USA (PhD 2002)


According to our database1, Alyssa B. Apsel authored at least 72 papers between 1996 and 2023.

Collaborative distances:
  • Dijkstra number2 of two.
  • Erdős number3 of three.

Timeline

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Bibliography

2023
Analog-Domain Self-Interference Cancellation for Practical Multi-Tap Full-Duplex System: Theory, Modeling, and Algorithm.
IEEE J. Sel. Areas Commun., September, 2023

EVE: Ephemeral Vector Engines.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

2022
PCO-Based BLE Mesh Accelerator.
Sensors, 2022

LO Synchronization Scheme via Full-Duplex Transceiver for Distributed Beamforming in Wireless Ad hoc Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Tuning Algorithm to Compensate for Hardware Errors of IBFD Analog Device.
Proceedings of the 56th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2022, Pacific Grove, CA, USA, October 31, 2022

2021
Sample-Efficient Spatio-Spectral Whitespace Detection Using Least Matching Pursuit.
IEEE Access, 2021

Layout-Based Evaluation of Read/Write Performance of SOT-MRAM and SOTFET-RAM.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

A Low Power, 3.5-20GHz Tunable LNA with Out-Of-Band Blocker Filtering Based on Compact, Tunable Transmission Line (CTTL) Resonators in 65nm CMOS.
Proceedings of the 47th ESSCIRC 2021, 2021

Scalable Digital Synchronizer for Enabling Hardware-Level BLE Mesh Networks under 1 mW.
Proceedings of the 47th ESSCIRC 2021, 2021

2020
An Integrated, Software-Defined FDD Transceiver: Distributed Duplexing Theory and Operation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Identifying Unused RF Channels Using Least Matching Pursuit.
Proceedings of the 21st IEEE International Workshop on Signal Processing Advances in Wireless Communications, 2020

Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator using In-Situ Processing-In-SRAM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2018
The Impact of LO Phase Noise in N-Path Filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Theory and Demonstration of Noisy Oscillator Samplers for Clock Jitter and Phase Delay Measurement.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Four Monolithically Integrated Switched-Capacitor DC-DC Converters With Dynamic Capacitance Sharing in 65-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A Bidirectional-Current CMOS Potentiostat for Fast-Scan Cyclic Voltammetry Detector Arrays.
IEEE Trans. Biomed. Circuits Syst., 2018

2017
A Wideband Fully Integrated Software-Defined Transceiver for FDD and TDD Operation.
IEEE J. Solid State Circuits, 2017

2016
Dual-Calibration Technique for Improving Static Linearity of Thermometer DACs for I/O.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Guest Editorial.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

A Wireless FSCV Monitoring IC With Analog Background Subtraction and UWB Telemetry.
IEEE Trans. Biomed. Circuits Syst., 2016

Challenges and approaches to software defined duplexing radio.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Broadly tunable frequency division duplex transceiver: Theory and operation.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

0.89 mW on-chip jitter-measurement circuit for high speed clock with sub-picosecond resolution.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2015
Global synchronization and the challenges of building network awareness.
XRDS, 2015

A quantized pulse coupled oscillator for slow clocking of peer-to-peer networks.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Low-Power, Minimally Invasive Process Compensation Technique for Sub-Micron CMOS Amplifiers.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Enabling Realistic Fine-Grain Voltage Scaling with Reconfigurable Power Distribution Networks.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

Crystal-less duty-cycled-when-active IR-UWB transceivers.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Part-time resonant switching for light load efficiency improvement of a 3-level fully integrated buck converter.
Proceedings of the ESSCIRC 2014, 2014

2013
A Crystal-Less Self-Synchronized Bit-Level Duty-Cycled IR-UWB Transceiver System.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2012
Improving Absolute Accuracy of Integrated Resistors With Device Diversification.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

2011
A 46-µW Self-Calibrated Gigahertz VCO for Low-Power Radios.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

A Low-Power, Process-and- Temperature- Compensated Ring Oscillator With Addition-Based Current Source.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A Low Power Impulse Radio Design for Body-Area-Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

Process Compensation Loops for High Speed Ring Oscillators in Sub-Micron CMOS.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011

A distributed amplifier based dispersive delay line.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Extending the dynamic range of implantable real-time neurochemical monitoring systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A Novel Dynamically Duty-Cyclable, Low Power UWB Impulse Radio Based Event Communication.
Proceedings of the Global Communications Conference, 2011

2010
An Ultralow-Power Dual-Band UWB Impulse Radio.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

A 6µw, 100kbps, 3-5ghz, UWB impulse radio transmitter.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

A successive approximation based process-invariant ring oscillator.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Process variation compensation of a 4.6 GHz LNA in 65nm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A 19μW, 100kbps Impulse Radio transceiver for body-area-networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

PCO Based Event Propagation Scheme for Globally Synchronized Sensor Networks.
Proceedings of the Global Communications Conference, 2010

2009
A Process Compensated 3-GHz Ring Oscillator.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Implementation of a Global Clocking Scheme for ULP Radio Networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Ultra-low Power Radios for Ad-hoc Networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Analysis of challenges for on-chip optical interconnects.
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

A low variation GHz ring oscillator with addition-based current source.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008
Low variation current source for 90nm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

124dB.Hz<sup>2/3</sup> Dynamic range transimpedance amplifier for electronic-photonic channelizer.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A 6.8GHz low-power and low-phase-noise phase-locked loop design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A 10 Gb/s optical receiver in 0.25 µm silicon-on-sapphire CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
On-Chip Optical Technology in Future Bus-Based Multicore Designs.
IEEE Micro, 2007

Process-Invariant Current Source Design: Methodology and Examples.
IEEE J. Solid State Circuits, 2007

Analog and asynchronous variation-aware circuits.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006
Leveraging Optical Technology in Future Bus-based Chip Multiprocessors.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

A low-voltage supply optoelectronic detector-receiver in a commercial silicon-based process.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Demonstration of latency reduction in electrical interconnections using optical fanout.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Synthesis of a current source using a formal design methodology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Common-emitter feedback transimpedance amplifier for analog optical receivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Level-Crossing Flash Asynchronous Analog-to-Digital Converter.
Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006

2005
A low-power silicon on sapphire CMOS optoelectronic receiver using low- and high-threshold devices.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

2004
Electrical isolation and fanout in intra-chip optical interconnects.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A 2.5 milliwatt SOS CMOS receiver for optical interconnect.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
Thin film PIN photodiodes for optoelectronic silicon on sapphire CMOS.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Analysis of short distance optoelectronic link architectures.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 10 milliwatt 2 Gbps CMOS optical receiver for optoelectronic interconnect.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 7 milliwatt 1GBPS CMOS optical receiver for through wafer communication.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
A 6 channel array of 5 milliwatt, 500 MHz optical receivers in .5 μm SOS CMOS.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2000
Edge orientation enhancement using optoelectronic VLSI and asynchronous pulse coding.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1996
VLSI Implementation of Cortical Visual Motion Detection Using an Analog Neural Computer.
Proceedings of the Advances in Neural Information Processing Systems 9, 1996


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