Andreas G. Andreou
Orcid: 0000-0003-3826-600XAffiliations:
- Johns Hopkins University, USA
According to our database1,
Andreas G. Andreou
authored at least 178 papers
between 1985 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
-
on ece.jhu.edu
On csauthors.net:
Bibliography
2023
NeuroBench: Advancing Neuromorphic Computing through Collaborative, Fair and Representative Benchmarking.
CoRR, 2023
Asynchronous, Spatiotemporal Filtering using an Analog Cellular Neural Network Processor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
A RISC-V Neuromorphic Micro-Controller Unit (vMCU) with Event-Based Physical Interface and Computational Memory for Low-Latency Machine Perception and Intelligence at the Edge.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the 57th Annual Conference on Information Sciences and Systems, 2023
2022
Proceedings of the 18th International Conference on Synthesis, 2022
Embedded Processing Pipeline Exploration For Neuromorphic Event Based Perceptual Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
RetinoSim: an Event-based Data Synthesis Tool for Neuromorphic Vision Architecture Exploration.
Proceedings of the ICONS 2022: International Conference on Neuromorphic Systems, Knoxville, TN, USA, July 27, 2022
Proceedings of the 8th International Conference on Event-Based Control, 2022
2021
Architecture and Algorithm Co-Design Framework for Embedded Processors in Event-Based Cameras.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the 55th Annual Conference on Information Sciences and Systems, 2021
Efficient, event-driven feature extraction and unsupervised object tracking for embedded applications.
Proceedings of the 55th Annual Conference on Information Sciences and Systems, 2021
Proceedings of the 55th Annual Conference on Information Sciences and Systems, 2021
2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
An FPGA multiprocessor architecture for Bayesian online change point detection using stochastic computation.
Microprocess. Microsystems, 2020
High-Speed, Real-Time, Spike-Based Object Tracking and Path Prediction on Google Edge TPU.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020
2019
A Historical Perspective on Hardware AI Inference, Charge-Based Computational Circuits and an 8 bit Charge-Based Multiply-Add Core in 16 nm FinFET CMOS.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019
A Mixed-Signal Successive Approximation Architecture for Energy-Efficient Fixed-Point Arithmetic in 16nm FinFET.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
The Conical-Fishbone Clock Tree: A Clock-Distribution Network for a Heterogeneous Chip Multiprocessor AI Chiplet.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
Graphical Model Transformation Analysis for Cognitive Computing and Machine Learning on the SpiNNaker Chip Multiprocessor.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
Characterization of a pseudo-DRAM Crossbar Computational Memory Array in 55nm CMOS : (Invited Paper).
Proceedings of the 53rd Annual Conference on Information Sciences and Systems, 2019
Multilevel Storage Cell Characterization and Behavior Modeling of a Crossbar Computational Array in ESF3 Flash Technology : (Invited Paper).
Proceedings of the 53rd Annual Conference on Information Sciences and Systems, 2019
Socio-Emotional Robot with Distributed Multi-Platform Neuromorphic Processing : (Invited Presentation).
Proceedings of the 53rd Annual Conference on Information Sciences and Systems, 2019
2018
IEEE Access, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A Charge-Based Architecture for Energy-Efficient Vector-Vector Multiplication in 65nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
StethoVest: A simultaneous multichannel wearable system for cardiac acoustic mapping.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
Implementation of the Neural Engineering Framework on the TrueNorth Neurosynaptic System.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
2017
J. Comput. Phys., 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Audio-Visual beamforming with the Eigenmike microphone array an omni-camera and cognitive auditory features.
Proceedings of the 51st Annual Conference on Information Sciences and Systems, 2017
Neuromorphic self-driving robot with retinomorphic vision and spike-based processing/closed-loop control.
Proceedings of the 51st Annual Conference on Information Sciences and Systems, 2017
Proceedings of the 51st Annual Conference on Information Sciences and Systems, 2017
2016
IEEE Trans. Biomed. Circuits Syst., 2016
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
Bio-inspired system architecture for energy efficient, BIGDATA computing with application to wide area motion imagery.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the 49th Annual Conference on Information Sciences and Systems, 2015
FPGA implementation of a Deep Belief Network architecture for character recognition using stochastic computation.
Proceedings of the 49th Annual Conference on Information Sciences and Systems, 2015
Markov Chain Monte Carlo inference on graphical models using event-based processing on the SpiNNaker neuromorphic architecture.
Proceedings of the 49th Annual Conference on Information Sciences and Systems, 2015
Mechanical design, instrumentation and measurements from a hemoacoustic cardiac phantom.
Proceedings of the 49th Annual Conference on Information Sciences and Systems, 2015
Proceedings of the 49th Annual Conference on Information Sciences and Systems, 2015
2013
Neural Networks, 2013
Design of silicon brains in the nano-CMOS era: Spiking neurons, learning synapses and neural architecture optimization.
Neural Networks, 2013
Multimodal Integration of Micro-Doppler Sonar and auditory signals for Behavior Classification with convolutional Networks.
Int. J. Neural Syst., 2013
Proceedings of the 47th Annual Conference on Information Sciences and Systems, 2013
Proceedings of the 47th Annual Conference on Information Sciences and Systems, 2013
Person localization through ground vibrations using a sand-scorpion inspired spiking neural network.
Proceedings of the 47th Annual Conference on Information Sciences and Systems, 2013
Proceedings of the 47th Annual Conference on Information Sciences and Systems, 2013
Proceedings of the 47th Annual Conference on Information Sciences and Systems, 2013
2012
Beyond Amdahl's Law: An Objective Function That Links Multiprocessor Performance Gains to Delay and Energy.
IEEE Trans. Computers, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
IEEE Trans. Biomed. Circuits Syst., 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Silicon-on-insulator (SOI) integration for organic field effect transistor (OFET) based circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
A 32×32 single photon avalanche diode imager with delay-insensitive address-event readout.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the Human Behavior Unterstanding - Second International Workshop, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
A wireless architecture for distributed sensing/actuation and pre-processing with microsecond synchronization.
Proceedings of the 45st Annual Conference on Information Sciences and Systems, 2011
Proceedings of the 45st Annual Conference on Information Sciences and Systems, 2011
A bio-inspired event-driven digital readout architecture with pixel-level A/D conversion and non-uniformity correction.
Proceedings of the 45st Annual Conference on Information Sciences and Systems, 2011
Proceedings of the 45st Annual Conference on Information Sciences and Systems, 2011
Design of a one million neuron single FPGA neuromorphic system for real-time multimodal scene analysis.
Proceedings of the 45st Annual Conference on Information Sciences and Systems, 2011
2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 28th International Conference on Human Factors in Computing Systems, 2010
2009
A Switched Capacitor Implementation of the Generalized Linear Integrate-and-fire Neuron.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the INTERSPEECH 2009, 2009
Analytical methods for the design and optimization of chip-multiprocessor architectures.
Proceedings of the 43rd Annual Conference on Information Sciences and Systems, 2009
Noise analysis and comparison of analog and digital readout integrated circuits for infrared focal plane arrays.
Proceedings of the 43rd Annual Conference on Information Sciences and Systems, 2009
2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
Design, Fabrication, and Testing of a Hybrid CMOS/PDMS Microsystem for Cell Culture and Incubation.
IEEE Trans. Biomed. Circuits Syst., 2007
Localized closed-loop temperature control and regulation in hybrid silicon/silicone life science microsystems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Proceedings of the 41st Annual Conference on Information Sciences and Systems, 2007
Proceedings of the 41st Annual Conference on Information Sciences and Systems, 2007
Fabrication and Testing of Single Photon Avalanche Detectors in the TSMC 0.18µm CMOS Technology.
Proceedings of the 41st Annual Conference on Information Sciences and Systems, 2007
Proceedings of the 41st Annual Conference on Information Sciences and Systems, 2007
Proceedings of the 41st Annual Conference on Information Sciences and Systems, 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
VLSI implementation of an energy-aware wake-up detector for an acoustic surveillance sensor network.
ACM Trans. Sens. Networks, 2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Microelectromechanical systems in 3D SOI-CMOS: sensing electronics embedded in mechanical structures.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Dark current and noise of 100nm thick silicon on sapphire CMOS lateral PIN photodiodes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A mixed analog/digital asynchronous processor for cortical computations in 3D SOI-CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 28th International Conference of the IEEE Engineering in Medicine and Biology Society, 2006
2005
A low-power silicon on sapphire CMOS optoelectronic receiver using low- and high-threshold devices.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
A comparative study of sound localization algorithms for energy aware sensor network nodes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
Neurocomputing, 2004
Surface micromachining in Silicon on Sapphire CMOS technology.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Silicon on sapphire CMOS architectures for interferometric array readout.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
ALOHA CMOS imager.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A 16 × 16 pixel silicon on sapphire CMOS photosensor array with a digital interface for adaptive wavefront correction.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A wake-up detector for an acoustic surveillance sensor network: algorithm and VLSI implementation.
Proceedings of the Third International Symposium on Information Processing in Sensor Networks, 2004
2003
IEEE Trans. Neural Networks, 2003
A comparative study of access topologies for chip-level address-event communication channels.
IEEE Trans. Neural Networks, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Design, double sided post-processing, and packaging of CMOS compatible bio-MEMS device arrays.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
Proc. IEEE, 2001
Probabilistic synaptic weighting in a reconfigurable network of VLSI integrate-and-fire neurons.
Neural Networks, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
Neurocomputing, 2000
A Programmable VLSI Filter Architecture for Application in Real-Time Vision Processing Systems.
Int. J. Neural Syst., 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Edge orientation enhancement using optoelectronic VLSI and asynchronous pulse coding.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks, 2000
1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Proceedings of the International Joint Conference Neural Networks, 1999
Proceedings of the International Joint Conference Neural Networks, 1999
Proceedings of the International Joint Conference Neural Networks, 1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
1998
Impact Ionization and Hot-Electron Injection Derived Consistently from Boltzmann Transport.
VLSI Design, 1998
Heteroscedastic discriminant analysis and reduced rank HMMs for improved speech recognition.
Speech Commun., 1998
1997
IEEE J. Solid State Circuits, 1997
Proceedings of International Conference on Neural Networks (ICNN'97), 1997
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997
1995
Neural Networks, 1995
Int. J. Neural Syst., 1995
A Silicon Retina for 2-D Position and 2-D Motion Computation.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
A 590, 000 transistor 48, 000 pixel, contrast sensitive, edge enhancing, CMOS imager-silicon retina.
Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI '95), 1995
1994
J. VLSI Signal Process., 1994
IEEE Trans. Computers, 1994
Proceedings of the Advances in Neural Information Processing Systems 7, 1994
A Model for MOS Effective Channel Mobility with Emphasis in the Subthreshold and Transition Region.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
The Multiple Input Floating Gate MOS Differential Amplifier An Analog Computational Building Block.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Analogue and Digital Neural VLSI: Duet or Duel?
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Storage Enhancement Techniques for Digital Memory Based, Analog Computational Engines.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
1993
VLSI Phase Locking Architectures for Feature Linking in Multiple Target Tracking Systems.
Proceedings of the Advances in Neural Information Processing Systems 6, 1993
Analog VLSI Neuromorphic Systems.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
Device Mismatch Limitations on the Performance of a Hamming Distance Classifier.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993
1992
IEEE Trans. Neural Networks, 1992
Proceedings of the Advances in Neural Information Processing Systems 5, [NIPS Conference, Denver, Colorado, USA, November 30, 1992
1991
IEEE Trans. Neural Networks, 1991
Analog LSI Implementation of an Auto-Adaptive Network for Real-Time Separation of Independent Signals.
Proceedings of the Advances in Neural Information Processing Systems 4, 1991
Proceedings of the Advances in Neural Information Processing Systems 4, 1991
1989
Neural Comput., 1989
1988
Proceedings of the Advances in Neural Information Processing Systems 1, 1988
1985
Hall-effect measurements on short-channel devices using the van der Pauw Dual technique.
Proc. IEEE, 1985