Ang Li

According to our database, Ang Li authored at least 4 papers between 2023 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

A Hierarchical 3-D Physical Design Method for Ultralarge-Scale Logic-on-Memory CGRA Chip.

Zizheng Dong, Shuaipeng Li, Weijia Zhu, Ang Li, Qin Wang, Naifeng Jing, Weiguang Sheng, Jianfei Jiang, Zhigang Mao

IEEE Trans. Very Large Scale Integr. Syst., June, 2025

2024

A Comprehensive Dataflow-Mapping Optimization for Fully Pipelined Execution in Spatial Programmable Architecture.

Pengyu Liu, Ang Li, Liyan Chen, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024

VDA: A Simple but Efficient Virtual-Channel-Based Deadlock Avoidance Scheme for Scalable Chiplet Networks.

Duo Yu, Ang Li, Naifeng Jing, Jianfei Jiang, Weiguang Sheng, Qin Wang

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023

ACET: An Adaptive Clock Scheme Exploiting Comprehensive Timing Slack for Reconfigurable Processors.

Shuya Ji, Weidong Yang, Jianfei Jiang, Naifeng Jing, Weiguang Sheng, Ang Li, Qin Wang

Proceedings of the 41st IEEE International Conference on Computer Design, 2023