Antonio Vilches

According to our database, Antonio Vilches authored at least 15 papers between 2004 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Efficient heterogeneous matrix profile on a CPU + High Performance FPGA with integrated HBM.

Jose Carlos Romero, Angeles G. Navarro, Antonio Vilches, Andrés Rodríguez, Francisco Corbera, Rafael Asenjo

Future Gener. Comput. Syst., 2021

2020

ScrimpCo: scalable matrix profile on commodity heterogeneous processors.

Jose Carlos Romero, Antonio Vilches, Andrés Rodríguez, Angeles G. Navarro, Rafael Asenjo

J. Supercomput., 2020

2019

Heterogeneous parallel_for Template for CPU-GPU Chips.

Angeles G. Navarro, Francisco Corbera, Andrés Rodríguez, Antonio Vilches, Rafael Asenjo

Int. J. Parallel Program., 2019

2016

Mapping Streaming Applications on Commodity Multi-CPU and GPU On-Chip Processors.

Antonio Vilches, Angeles G. Navarro, Rafael Asenjo, Francisco Corbera, Ruben Gran, María Jesús Garzarán

IEEE Trans. Parallel Distributed Syst., 2016

2015

Proceedings of the Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES) 2015.

Francisco Corbera, Andrés Rodríguez, Rafael Asenjo, Angeles G. Navarro, Antonio Vilches, María Jesús Garzarán, Ismat Chaib Draa, Jamel Tayeb, Smaïl Niar, Mikael Desertot, Daniel Gregorek, Robert Schmidt, Alberto García Ortiz, Pedro López-García, Rémy Haemmerlé, Maximiliano Klemen, Umer Liqat, Manuel V. Hermenegildo, Radim Vavrík, Albert Saà-Garriga, David Castells-Rufas, Jordi Carrabina

CoRR, 2015

Reducing overheads of dynamic scheduling on heterogeneous chips.

Francisco Corbera, Andrés Rodríguez, Rafael Asenjo, Angeles G. Navarro, Antonio Vilches, María Jesús Garzarán

CoRR, 2015

Parallel Pipeline on Heterogeneous Multi-processing Architectures.

Andrés Rodríguez, Angeles G. Navarro, Rafael Asenjo, Antonio Vilches, Francisco Corbera, María Jesús Garzarán

Proceedings of the 2015 IEEE TrustCom/BigDataSE/ISPA, 2015

Pipeline Template for Streaming Applications on Heterogeneous Chips.

Andrés Rodríguez, Angeles G. Navarro, Rafael Asenjo, Francisco Corbera, Antonio Vilches, María Jesús Garzarán

Proceedings of the Parallel Computing: On the Road to Exascale, 2015

Adaptive Partitioning for Irregular Applications on Heterogeneous CPU-GPU Chips.

Antonio Vilches, Rafael Asenjo, Angeles G. Navarro, Francisco Corbera, Ruben Gran Tejero, María Jesús Garzarán

Proceedings of the International Conference on Computational Science, 2015

2014

Strategies for maximizing utilization on multi-CPU and multi-GPU heterogeneous architectures.

Angeles G. Navarro, Antonio Vilches, Francisco Corbera, Rafael Asenjo

J. Supercomput., 2014

Adaptive partitioning strategies for loop parallelism in heterogeneous architectures.

Angeles G. Navarro, Antonio Vilches, Rafael Asenjo, Francisco Corbera

Proceedings of the International Conference on High Performance Computing & Simulation, 2014

2012

Inductive and Ultrasonic Multi-Tier Interface for Low-Power, Deeply Implantable Medical Devices.

Ayodele Sanni, Antonio Vilches, Christofer Toumazou

IEEE Trans. Biomed. Circuits Syst., 2012

2011

A bio-implantable platform for inductive data and power transfer with integrated battery charging.

Michael Sole, Ayodele Sanni, Antonio Vilches, Christofer Toumazou, Timothy G. Constandinou

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2005

Monolithic large-signal transimpedance amplifier for use in multi-gigabit, short-range optoelectronic interconnect applications.

Antonio Vilches, Rodney Loga, Mouhamed Rahal, Kristel Fobelets, Christos Papavassiliou, Trevor J. Hall

IEEE Trans. Circuits Syst. II Express Briefs, 2005

2004

SiGe HMODFET "KAIST" micropower model and amplifier realization.

Antonio Vilches, Kristel Fobelets, Kostis Michelakis, Solon Despotopoulos, Christos Papavassiliou, Thomas Hackbarth, Ulf König

IEEE Trans. Circuits Syst. I Regul. Pap., 2004