Anuranjan Jha

According to our database1, Anuranjan Jha authored at least 5 papers between 2006 and 2016.

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Bibliography

2016
9.4 A 2×2 WLAN and Bluetooth combo SoC in 28nm CMOS with on-chip WLAN digital power amplifier, integrated 2G/BT SP3T switch and BT pulling cancelation.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
9.4 A 28nm CMOS digital fractional-N PLL with -245.5dB FOM and a frequency tripler for 802.11abgn/ac radio.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2010
A Discrete-Time Digital-IF Interference-Robust Ultrawideband Pulse Radio Transceiver Architecture.
IEEE Trans. on Circuits and Systems, 2010

2008
Wideband Signal Synthesis Using Interleaved Partial-Order Hold Current-Mode Digital-to-Analog Converters.
IEEE Trans. on Circuits and Systems, 2008

2006
Quadrature-DAC based pulse generation for UWB pulse radio transceivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006


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