Daibashish Gangopadhyay

According to our database1, Daibashish Gangopadhyay authored at least 12 papers between 2006 and 2016.

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Bibliography

2016
9.4 A 2×2 WLAN and Bluetooth combo SoC in 28nm CMOS with on-chip WLAN digital power amplifier, integrated 2G/BT SP3T switch and BT pulling cancelation.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2014
Compressed Sensing Analog Front-End for Bio-Sensor Applications.
J. Solid-State Circuits, 2014

2012
Compressed Sensing System Considerations for ECG and EMG Wireless Biosensors.
IEEE Trans. Biomed. Circuits and Systems, 2012

A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS.
J. Solid-State Circuits, 2012

A 1.1µW 2.1µVRMS input noise chopper-stabilized amplifier for bio-medical applications.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
A 2.4-GHz Extended-Range Type-I SigmaDelta Fractional-N Synthesizer With 1.8-MHz Loop Bandwidth and -110-dBc/Hz Phase Noise.
IEEE Trans. on Circuits and Systems, 2011

Compressive sampling of EMG bio-signals.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Analog Chirp Fourier Transform for high-resolution real-time wideband RF spectrum Analysis.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Compressed sensing reconstruction: Comparative study with applications to ECG bio-signals.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
A Mode-I/Mode-III UWB LNA with programmable gain and 20 dB WLAN blocker rejection in 130nm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A 1.6 mW 5.4 GHz transformer-feedback gm-boosted current-reuse LNA in 0.18/μm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2006
A Low Power 1.8 V 4-Bit 400-MHz Flash ADC in 0.18µ Digital CMOS.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006


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