Atsuyuki Ikeya

According to our database, Atsuyuki Ikeya authored at least 2 papers in 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs.

Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Yasushi Hayakawa, Takeshi Oshita, Satoshi Kaneko, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

An 80 Gbps dependable multicore communication SoC with PCI express I/F and intelligent interrupt controller.

Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato

Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011