Itaru Nonomura

According to our database1, Itaru Nonomura authored at least 6 papers between 2005 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2011
Peach: A Multicore Communication System on Chip with PCI Express.
IEEE Micro, 2011

An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

An 80 Gbps dependable multicore communication SoC with PCI express I/F and intelligent interrupt controller.
Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011

2010
3-D System Integration of Processor and Multi-Stacked SRAMs Using Inductive-Coupling Link.
IEEE J. Solid State Circuits, 2010

2009
An inductive-coupling link for 3D integration of a 90nm CMOS processor and a 65nm CMOS SRAM.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2005
Elastic shared resource scheduling SOC interconnect architecture for real-time system.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005


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