Ayman Shabra

Orcid: 0000-0002-6315-3413

According to our database1, Ayman Shabra authored at least 18 papers between 2001 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Design Techniques for High Linearity and Dynamic Range Digital to Analog Converters.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

2019
A Reconfigurable DLL-Based Digital-to-Time Converter Using Charge Pump Current Interpolation and Digital Predistortion Linearization.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A 20 kHz Bandwidth Resistive DAC with 135 dBA Dynamic Range and 125 dB THD.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2017
A Temperature Estimation Method Using the Ratio of Emitter-to-Base Voltages.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A 60-90GHz stagger-tuned low-noise amplifier with 1.2dBm OP1dB in 65nm CMOS.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

Session 7 - Data converter techniques.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
Impact of fractional bandwidth on the bit error rate of a beamforming system.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

A preliminary evaluation of continuous, shoe-integrated weight measurements for heart failure patients.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

2015
A flash-TDC hybrid ADC architecture.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Reference-less SAR ADC for on-chip thermal monitoring in CMOS.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

FPGA methodology for power analysis of embedded adaptive beamforming.
Proceedings of the International Conference on Communications, 2015

A pulsed-index technique for single-channel, low-power, dynamic signaling.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
1.8GHz 3rd order lowpass filter with programmable gain in 180nm CMOS.
Proceedings of the ESSCIRC 2014, 2014

2013
A time-interleaved ADC architecture exploiting correlations between samples.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Variability analysis of a 28nm near-threshold synchronous voltage converter.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

2004
GSM DAC with new segmented mismatch shaping technique.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2002
Oversampled pipeline A/D converters with mismatch shaping.
IEEE J. Solid State Circuits, 2002

2001
Oversampled pipline analog to digital converters with mismatch shaping.
PhD thesis, 2001


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