Jeffrey C. Gealow

According to our database, Jeffrey C. Gealow authored at least 13 papers between 1996 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

A -89-dBc IMD3 DAC Sub-System in a 465-MHz BW CT Delta-Sigma ADC Using a Power and Area Efficient Calibration Technique.

Jialin Zhao, Yunzhi Dong, Wenhua Yang, Hajime Shibata, Prawal Shrestha, Zhao Li, Trevor C. Caldwell, José B. Silva, Jeffrey C. Gealow

IEEE Trans. Circuits Syst. II Express Briefs, 2018

2017

A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology.

Siddharth Devarajan, Larry Singer, Dan Kelly, Tao Pan, José B. Silva, Janet Brunsilius, Daniel Rey-Losada, Frank Murden, Carroll Speir, Jeff Bray, Eric Otte, Nevena Rakuljic, Phil Brown, Todd Weigandt, Qicheng Yu, Donald Paterson, Corey Petersen, Jeffrey C. Gealow, Gabriele Manganaro

IEEE J. Solid State Circuits, 2017

16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology.

Siddharth Devarajan, Larry Singer, Dan Kelly, Steve Kosic, Tao Pan, José B. Silva, Janet Brunsilius, Daniel Rey-Losada, Frank Murden, Carroll Speir, Jeff Bray, Eric Otte, Nevena Rakuljic, Phil Brown, Todd Weigandt, Qicheng Yu, Donald Paterson, Corey Petersen, Jeffrey C. Gealow

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS.

Yunzhi Dong, José B. Silva, Qingdong Meng, Jialin Zhao, Wenhua Yang, Trevor C. Caldwell, Hajime Shibata, Zhao Li, Donald Paterson, Jeffrey C. Gealow

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016

A 72 dB-DR 465 MHz-BW Continuous-Time 1-2 MASH ADC in 28 nm CMOS.

Yunzhi Dong, Jialin Zhao, Wenhua Yang, Trevor C. Caldwell, Hajime Shibata, Zhao Li, Richard Schreier, Qingdong Meng, José B. Silva, Donald Paterson, Jeffrey C. Gealow

IEEE J. Solid State Circuits, 2016

Foreword.

Jeffrey C. Gealow, Masato Motomura

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

15.5 A 930mW 69dB-DR 465MHz-BW CT 1-2 MASH ADC in 28nm CMOS.

Yunzhi Dong, Jialin Zhao, Wenhua Yang, Trevor C. Caldwell, Hajime Shibata, Richard Schreier, Qingdong Meng, José B. Silva, Donald Paterson, Jeffrey C. Gealow

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015

Introduction to the Special Issue on the 2014 Symposium on VLSI Circuits.

Jeffrey C. Gealow, Masato Motomura

IEEE J. Solid State Circuits, 2015

2014

Introduction to the Special Issue on the 2013 Symposium on VLSI Circuits.

Hideyuki Kabuo, Jeffrey C. Gealow

IEEE J. Solid State Circuits, 2014

2004

GSM DAC with new segmented mismatch shaping technique.

Ayman Shabra, Jeffrey C. Gealow, Paul F. Ferguson Jr.

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

1999

A pixel-parallel image processor using logic pitch-matched to dynamic memory.

Jeffrey C. Gealow, Charles G. Sodini

IEEE J. Solid State Circuits, 1999

1998

Invited Address: Integrated Memory/Logic Architecture for Image Processing.

Charles G. Sodini, Jeffrey C. Gealow, Zubair A. Talib, Ichiro Masaki

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

1996

System design for pixel-parallel image processing.

Jeffrey C. Gealow, Frederick P. Herrmann, L. T. Hsu, Charles G. Sodini

IEEE Trans. Very Large Scale Integr. Syst., 1996