Aymane Bouzafour

According to our database, Aymane Bouzafour authored at least 5 papers between 2018 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Design of a compact QRNG in 22nm standard CMOS technology.

Andrea Bonzi, Nicola Massari, Luca Parmesan, Fabio Acerbi, Sonia Mazzucchi, Aymane Bouzafour, Marc Renaudin, Leonardo Gasparini

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

Live Demonstration: A self-adapting randomness extractor for a monolithic QRNG.

Andrea Bonzi, Nicola Massari, Luca Parmesan, Fabio Acerbi, Aymane Bouzafour, Marc Renaudin, Leonardo Gasparini

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2020

Modeling an Asynchronous Circuit Dedicated to the Protection Against Physical Attacks.

Radu Mateescu, Wendelin Serwe, Aymane Bouzafour, Marc Renaudin

Proceedings of the 4th Workshop on Models for Formal Analysis of Real Systems, 2020

2018

A 6-Wire Plug and Play Clockless Distributed On-Chip-Sensor Network in 28 nm UTBB FD-SOI.

Marc Renaudin, Aymane Bouzafour, Sylvain Engels, Robin Wilson

J. Low Power Electron., 2018

Model-Checking Synthesizable SystemVerilog Descriptions of Asynchronous Circuits.

Aymane Bouzafour, Marc Renaudin, Hubert Garavel, Radu Mateescu, Wendelin Serwe

Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems, 2018