Wendelin Serwe

Affiliations:
  • INRIA, France


According to our database1, Wendelin Serwe authored at least 42 papers between 2000 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

Online presence:

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Bibliography

2024
Testing Resource Isolation for System-on-Chip Architectures.
CoRR, 2024

2023
Verifying Collision Risk Estimation using Autonomous Driving Scenarios Derived from a Formal Model.
J. Intell. Robotic Syst., April, 2023

2022
Formally Modeling Autonomous Vehicles in LNT for Simulation and Testing.
Proceedings of the Proceedings Fifth Workshop on Models for Formal Analysis of Real Systems, 2022

Using Formal Conformance Testing to Generate Scenarios for Autonomous Vehicles.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
Is CADP an Applicable Formal Method?
Proceedings of the Proceedings First Workshop on Applicable Formal Methods, 2021

2020
Modeling an Asynchronous Circuit Dedicated to the Protection Against Physical Attacks.
Proceedings of the 4th Workshop on Models for Formal Analysis of Real Systems, 2020

Automated Transition Coverage in Behavioural Conformance Testing.
Proceedings of the Testing Software and Systems, 2020

Combining SLiVER with CADP to Analyze Multi-agent Systems.
Proceedings of the Coordination Models and Languages, 2020

2019
Asynchronous Testing of Synchronous Components in GALS Systems.
Proceedings of the Integrated Formal Methods - 15th International Conference, 2019

Hunting Superfluous Locks with Model Checking.
Proceedings of the From Software Engineering to Formal Methods and Tools, and Back, 2019

2018
TESTOR: A Modular Tool for On-the-Fly Conformance Test Case Generation.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2018

Using LNT Formal Descriptions for Model-Based Diagnosis.
Proceedings of the 29th International Workshop on Principles of Diagnosis co-located with 10th IFAC Symposium on Fault Detection, 2018

Model-Checking Synthesizable SystemVerilog Descriptions of Asynchronous Circuits.
Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems, 2018

2017
The Unheralded Value of the Multiway Rendezvous: Illustration with the Production Cell Benchmark.
Proceedings of the Proceedings 2nd Workshop on Models for Formal Analysis of Real Systems, 2017

From LOTOS to LNT.
Proceedings of the ModelEd, TestEd, TrustEd, 2017

2016
An improved fault-tolerant routing algorithm for a Network-on-Chip derived with formal analysis.
Sci. Comput. Program., 2016

2015
Formal Specification and Verification of Fully Asynchronous Implementations of the Data Encryption Standard.
Proceedings of the Proceedings Workshop on Models for Formal Analysis of Real Systems, 2015

Using a Formal Model to Improve Verification of a Cache-Coherent System-on-Chip.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2015

2014
Formal analysis of a hardware dynamic task dispatcher with CADP.
Sci. Comput. Program., 2014

Formal Analysis of a Fault-Tolerant Routing Algorithm for a Network-on-Chip.
Proceedings of the Formal Methods for Industrial Critical Systems, 2014

2013
CADP 2011: a toolbox for the construction and analysis of distributed processes.
Int. J. Softw. Tools Technol. Transf., 2013

Model checking and performance evaluation with CADP illustrated on shared-memory mutual exclusion protocols.
Sci. Comput. Program., 2013

Formal Analysis of the ACE Specification for Cache Coherent Systems-on-Chip.
Proceedings of the Formal Methods for Industrial Critical Systems, 2013

2012
Large-scale Distributed Verification Using CADP: Beyond Clusters to Grids.
Proceedings of the Proceedings the Sixth International Workshop on the Practical Application of Stochastic Modelling, 2012

2011
CADP 2010: A Toolbox for the Construction and Analysis of Distributed Processes.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2011

Model Checking and Co-simulation of a Dynamic Task Dispatcher Circuit Using CADP.
Proceedings of the Formal Methods for Industrial Critical Systems, 2011

2010
Ten Years of Performance Evaluation for Concurrent Systems Using CADP.
Proceedings of the Leveraging Applications of Formal Methods, Verification, and Validation, 2010

A Study of Shared-Memory Mutual Exclusion Protocols Using CADP.
Proceedings of the Formal Methods for Industrial Critical Systems, 2010

2009
On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP.
Sci. Comput. Program., 2009

Verification of an industrial SystemC/TLM model using LOTOS and CADP.
Proceedings of the 7th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2009), 2009

Towards Performance Prediction of Compositional Models in Industrial GALS Designs.
Proceedings of the Computer Aided Verification, 21st International Conference, 2009

2008
A Schedulerless Semantics of TLM Models Written in SystemC Via Translation into LOTOS.
Proceedings of the FM 2008: Formal Methods, 2008

2007
CADP 2006: A Toolbox for the Construction and Analysis of Distributed Processes.
Proceedings of the Computer Aided Verification, 19th International Conference, 2007

Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip.
Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007

2006
State space reduction for process algebra specifications.
Theor. Comput. Sci., 2006

2005
Translating Hardware Process Algebras into Standard Process Algebras: Illustration with CHP and LOTOS.
Proceedings of the Integrated Formal Methods, 5th International Conference, 2005

2004
Abstracting Call-Stacks for Interprocedural Verification of Imperative Programs.
Proceedings of the Algebraic Methodology and Software Technology, 2004

2003
Statically assuring secrecy for dynamic concurrent processes.
Proceedings of the 5th International ACM SIGPLAN Conference on Principles and Practice of Declarative Programming, 2003

2002
Etude de la programmation logico-fonctionnelle concurrente.
PhD thesis, 2002

2001
Defining Actions in Concurrent Declarative Programming.
Proceedings of the International Workshop on Functional and (Constraint) Logic Programming, 2001

Timed Term Rewrite Systems.
Proceedings of the International Workshop on Functional and (Constraint) Logic Programming, 2001

2000
Combining Mobile Processes and Declarative Programming.
Proceedings of the Computational Logic, 2000


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