B. Borot

According to our database1, B. Borot authored at least 2 papers between 2002 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
Delay partitioning helps reducing variability in 3DVLSI.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2002
Validated 90nm CMOS Technology Platform with Low-k Copper Interconnects for Advanced System-on-Chip (SoC).
Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002


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