Sylvie Naudet

According to our database1, Sylvie Naudet authored at least 8 papers between 2002 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2017
Cognitive approach to support dynamic aging compensation.
Proceedings of the IEEE International Test Conference, 2017

Dynamic aging compensation and Safety measures in Automotive environment.
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

2016
An Effective Power-Aware At-Speed Test Methodology for IP Qualification and Characterization.
J. Electron. Test., 2016

28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

Analysis of setup and hold margins inside silicon for advanced technology nodes.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

2015
Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

2005
A Practical Guide to Marker Based and Hybrid Visual Registration for AR Industrial Applications.
Proceedings of the Computer Analysis of Images and Patterns, 11th International Conference, 2005

2002
Validated 90nm CMOS Technology Platform with Low-k Copper Interconnects for Advanced System-on-Chip (SoC).
Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002


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