Bernhard Wunder

According to our database1, Bernhard Wunder authored at least 5 papers between 1996 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2012
Performance analysis and modeling of deep trench decoupling capacitor for 32 nm high-performance SOI processors and beyond.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

1996
Basic concepts for an HDL reverse engineering tool-set.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

A new concept for accurate modeling of VLSI interconnections and its application for timing simulation.
Proceedings of the conference on European design automation, 1996

A VHDL reuse workbench.
Proceedings of the conference on European design automation, 1996

VAMP: A VHDL-Based Concept for Accurate Modeling and Post Layout Timing Simulation of Electronic Systems.
Proceedings of the 33st Conference on Design Automation, 1996


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