Bertrand Vrignon

According to our database1, Bertrand Vrignon authored at least 8 papers between 2011 and 2015.

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Bibliography

2015
Near-field injection on a Safe System Basis Chip at silicon level.
Proceedings of the 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, 2015

2014
Electromagnetic analysis, deciphering and reverse engineering of integrated circuits (E-MATA HARI).
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

2013
LDO regulator DC characteristic and susceptibility prediction after electrical stress ageing.
Microelectron. Reliab., 2013

Automatic verification of EMC immunity by simulation.
Proceedings of the 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits, 2013

2012
On-Chip Noise Sensor for Integrated Circuit Susceptibility Investigations.
IEEE Trans. Instrum. Meas., 2012

IC Immunity Modeling Process Validation Using On-Chip Measurements.
J. Electron. Test., 2012

Prediction of Long-term Immunity of a Phase-Locked Loop.
J. Electron. Test., 2012

2011
A New Approach to Modeling the Impact of EMI on MOSFET DC Behavior.
IEICE Trans. Electron., 2011


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