Bingyi Ye

Orcid: 0000-0002-7671-2800

According to our database1, Bingyi Ye authored at least 11 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
A Five-Tap Delay-Line-Based Feed-Forward-Equalizer for 200-Gb/s Wireline Receiver in 28-nm CMOS.
IEEE J. Solid State Circuits, January, 2024

2023
A 2.29-pJ/b 112-Gb/s Wireline Transceiver With RX Four-Tap FFE for Medium-Reach Applications in 28-nm CMOS.
IEEE J. Solid State Circuits, 2023

A 4.6-pJ/b 200-Gb/s Analog DP-QPSK Coherent Optical Receiver in 28-nm CMOS.
IEEE J. Solid State Circuits, 2023

A 0.43pJ/b 200Gb/s 5-Tap Delay-Line-Based Receiver FFE with Low-Frequency Equalization in 28nm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A 128Gb/s PAM-4 Transmitter with Programmable-Width Pulse Generator and Pattern-Dependent Pre-Emphasis in 28nm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022
A 2.29pJ/b 112Gb/s Wireline Transceiver with RX 4-Tap FFE for Medium-Reach Applications in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A 4.6pJ/b 200Gb/s Analog DP-QPSK Coherent Optical Receiver in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
56 Gb/s PAM4 receiver with an overshoot compensation scheme in 28 nm CMOS technology.
Microelectron. J., 2021

Analog Signal Processing Circuits for a 400Gb/s 16QAM Optical Coherent Receiver.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 25Gb/s 185mW PAM-4 Receiver with 4-Tap Adaptive DFE and Sampling Clock Optimization in 55nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021


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