Bingyi Ye

According to our database, Bingyi Ye authored at least 18 papers between 2021 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

8.4 A 112Gb/S/Wire Single-Ended Simultaneous Bi-Directional Transceiver with Dynamic Equalizer for Die-to-Die Interface in 28nm CMOS.

Zhiwen Huang, Zhifei Wang, Bingyi Ye, Tianchen Ye, Dunshan Yu, Wei Wang, Weixin Gai

Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2025

A 50Gb/s Burst-Mode NRZ Receiver with 5-Tap FFE, 7-Tap DFE and 15ns Lock Time in 28nm CMOS for Symmetric 50G-PON.

Boyang Zhang, Tianchen Ye, Shuaizhe Ma, Tianyuan Zhong, Xin Liu, Feiyang Zhang, Bingyi Ye, Dan Li, Weixin Gai

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

A 1.11pJ/b 224Gb/s XSR Receiver with Slice-Based CTLE and PI-Based Clock Generator in 12nm CMOS.

Bingyi Ye, Tianchen Ye, Tianyuan Zhong, Zhiwen Huang, Lei Shen, Boyang Zhang, Dunshan Yu, Yandong He, Weixin Gai

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

25.5 A 99.5mW/Port DC-to-40GHz Integrated Channel Analyzer for High-Density Signal Integrity Measurement in 28nm CMOS.

Guangdong Wu, Yuanliang Li, Bingyi Ye, Fangzhu Li, Xin Liu, Haowei Niu, Ruixu Wang, Dunshan Yu, Weixin Gai

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

A 64Gb/s/wire 10.5Tb/s/mm/Layer Single-Ended Simultaneous Bi-Directional Transceiver with Echo and Crosstalk Cancellation for a Die-to-Die Interface in 28nm CMOS.

Zhifei Wang, Zhiwen Huang, Tianchen Ye, Bingyi Ye, Fangzhu Li, Wei Wang, Dunshan Yu, Weixin Gai

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

An Enhanced ASAP7 PDK with Power Via Technology for IR Drop and PPA Evaluation.

Mingjie Yu, Jiaqi Dou, Bingyi Ye, Yang Shen, Xiaojin Li, Yanling Shi, Yuhang Zhang, Yabin Sun

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2025

2024

A Five-Tap Delay-Line-Based Feed-Forward-Equalizer for 200-Gb/s Wireline Receiver in 28-nm CMOS.

Bingyi Ye, Guangdong Wu, Weixin Gai, Kai Sheng, Yandong He

IEEE J. Solid State Circuits, January, 2024

A 200-Gb/s PAM-4 Transmitter with 1.6-Vppd Output Swing and Clock Skew Correction in 12-nm FinFET.

Boyang Zhang, Zhifei Wang, Zeze Feng, Tianchen Ye, Bingyi Ye, Zixu Wang, Weixin Gai

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023

A 2.29-pJ/b 112-Gb/s Wireline Transceiver With RX Four-Tap FFE for Medium-Reach Applications in 28-nm CMOS.

Bingyi Ye, Kai Sheng, Weixin Gai, Haowei Niu, Boyang Zhang, Yandong He, Song Jia, Congcong Chen, Jiaqi Yu

IEEE J. Solid State Circuits, 2023

A 4.6-pJ/b 200-Gb/s Analog DP-QPSK Coherent Optical Receiver in 28-nm CMOS.

Kai Sheng, Haowei Niu, Boyang Zhang, Weixin Gai, Bingyi Ye, Hang Zhou, Congcong Chen

IEEE J. Solid State Circuits, 2023

A 0.43pJ/b 200Gb/s 5-Tap Delay-Line-Based Receiver FFE with Low-Frequency Equalization in 28nm CMOS.

Bingyi Ye, Guangdong Wu, Weixin Gai, Kai Sheng, Yandong He

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A 128Gb/s PAM-4 Transmitter with Programmable-Width Pulse Generator and Pattern-Dependent Pre-Emphasis in 28nm CMOS.

Kai Sheng, Weixin Gai, Zeze Feng, Haowei Niu, Bingyi Ye, Hang Zhou

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022

A 2.29pJ/b 112Gb/s Wireline Transceiver with RX 4-Tap FFE for Medium-Reach Applications in 28nm CMOS.

Bingyi Ye, Kai Sheng, Weixin Gai, Haowei Niu, Boyang Zhang, Yandong He, Song Jia, Congcong Chen, Jiaqi Yu

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A 4.6pJ/b 200Gb/s Analog DP-QPSK Coherent Optical Receiver in 28nm CMOS.

Kai Sheng, Haowei Niu, Boyang Zhang, Weixin Gai, Bingyi Ye, Hang Zhou, Congcong Chen

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications.

Ninghuang Li, Weixin Gai, Bingyi Ye, Haowei Niu, Lei Lu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

56 Gb/s PAM4 receiver with an overshoot compensation scheme in 28 nm CMOS technology.

Ai He, Weixin Gai, Bingyi Ye, Boyang Zhang, Kai Sheng, Yuanliang Li

Microelectron. J., 2021

Analog Signal Processing Circuits for a 400Gb/s 16QAM Optical Coherent Receiver.

Boyang Zhang, Weixin Gai, Haowei Niu, Bingyi Ye, Kai Sheng, Tianjian Zuo, Lei Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 25Gb/s 185mW PAM-4 Receiver with 4-Tap Adaptive DFE and Sampling Clock Optimization in 55nm CMOS.

Liangxiao Tang, Weixin Gai, Chih-Kong Ken Yang, Bingyi Ye, Congcong Chen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021