Bo Zhang

Orcid: 0000-0003-3215-8745

Affiliations:
  • University of Southern California, Department of Electrical and Computer Engineering, Los Angeles, CA, USA


According to our database1, Bo Zhang authored at least 8 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A High-Performance, Conflict-Free Memory-Access Architecture for Modular Polynomial Multiplication.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2024

2023
An Iterative Montgomery Modular Multiplication Algorithm With Low Area-Time Product.
IEEE Trans. Computers, 2023

2022
High-Radix Design of a Scalable Montgomery Modular Multiplier With Low Latency.
IEEE Trans. Computers, 2022

2021
Metastability in Superconducting Single Flux Quantum (SFQ) Logic.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A High-Performance Low-Power Barrett Modular Multiplier for Cryptosystems.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

2020
A Timing Uncertainty-Aware Clock Tree Topology Generation Algorithm for Single Flux Quantum Circuits.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Ground Plane Partitioning for Current Recycling of Superconducting Circuits.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2018
Accurate margin calculation for single flux quantum logic cells.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018


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