Mingzhe Zhang
Orcid: 0000-0002-6440-7550Affiliations:
- Ant Research, Beijing, China
According to our database1,
Mingzhe Zhang authored at least 57 papers
between 2012 and 2026.
Collaborative distances:
Collaborative distances:
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Bibliography
2026
GPU Acceleration of TFHE-Based High-Precision Nonlinear Layers for Encrypted LLM Inference.
CoRR, April, 2026
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2026
IEEE Trans. Computers, February, 2026
Libra: Pattern-Scheduling Co-Optimization for Cross-Scheme FHE Code Generation over GPGPU.
IACR Cryptol. ePrint Arch., 2026
A Bitwidth-Flexible Modular Multiplier with Shift-Free Accumulation for Efficient NTT Acceleration in FHE.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
An Efficient and Scalable Hardware Architecture for Number Theoretic Transform on FPGA with Design Automation.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2026
Xerxes: Extensive Exploration of Scalable Hardware Systems with CXL-Based Simulation Framework.
Proceedings of the 24th USENIX Conference on File and Storage Technologies, 2026
Falcon: Algorithm-Hardware Co-Design for Efficient Fully Homomorphic Encryption Accelerator.
Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2026
A Framework for Developing and Optimizing Fully Homomorphic Encryption Programs on GPUs.
Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2026
2025
Cybersecur., December, 2025
An Efficient Delta Compression Framework Seamlessly Integrated into Inline Deduplication.
ACM Trans. Storage, November, 2025
RAC-NAF: A Reconfigurable Analog Circuitry for Nonlinear Activation Function Computation in Computing-in-Memory.
IEEE J. Solid State Circuits, October, 2025
On Improving the Performance of Intra- and Inter-chiplet Interconnection Networks in Multi-chiplet Systems for Accelerating FHE Encrypted Neural Network Applications.
ACM Trans. Embed. Comput. Syst., 2025
LEGOSim: A Unified Parallel Simulation Framework for Multi-chiplet Heterogeneous Integration.
Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025
HAWK: Fully Homomorphic Encryption Accelerator with Fixed-Word Key Decomposition Switching.
Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025
XHarvest: Rethinking High-Performance and Cost-Efficient SSD Architecture with CXL-Driven Harvesting.
Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025
Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025
Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025
Proceedings of the 31th IEEE International Conference on Parallel and Distributed Systems, 2025
Proceedings of the Thirteenth International Conference on Learning Representations, 2025
WarpDrive: GPU-Based Fully Homomorphic Encryption Acceleration Leveraging Tensor and CUDA Cores.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025
ALLMod: Exploring Area-Efficiency of LUT-based Large Number Modular Reduction via Hybrid Workloads.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025
Corrosion Hammer: A Self-Activated Bit-Flip Attack to the Processing-In-Memory Accelerator.
Proceedings of the 22nd ACM International Conference on Computing Frontiers, 2025
Proceedings of the 2025 ACM SIGSAC Conference on Computer and Communications Security, 2025
Proceedings of the Advanced Parallel Processing Technologies, 2025
2024
Skyway: Accelerate Graph Applications with a Dual-Path Architecture and Fine-Grained Data Management.
J. Comput. Sci. Technol., July, 2024
Taiyi: A high-performance CKKS accelerator for Practical Fully Homomorphic Encryption.
CoRR, 2024
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024
Flagger: Cooperative Acceleration for Large-Scale Cross-Silo Federated Learning Aggregation.
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024
Alchemist: A Unified Accelerator Architecture for Cross-Scheme Fully Homomorphic Encryption.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
2023
CoRR, 2023
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
2022
VNet: a versatile network to train real-time semantic segmentation models on a single GPU.
Sci. China Inf. Sci., 2022
IEEE Comput. Archit. Lett., 2022
2021
Distilling Bit-level Sparsity Parallelism for General Purpose Deep Learning Acceleration.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
CoPIM: A Concurrency-aware PIM Workload Offloading Architecture for Graph Applications.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Proceedings of the ICPP 2021: 50th International Conference on Parallel Processing, Lemont, IL, USA, August 9, 2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
2019
Quick-and-Dirty: An Architecture for High-Performance Temporary Short Writes in MLC PCM.
IEEE Trans. Computers, 2019
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
When Deep Learning Meets the Edge: Auto-Masking Deep Neural Networks for Efficient Machine Learning on Edge Devices.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
C-MAP: Improving the Effectiveness of Mapping Method for CGRA by Reducing NoC Congestion.
Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
FindeR: Accelerating FM-Index-Based Exact Pattern Matching in Genomic Sequences through ReRAM Technology.
Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019
2018
Mmalloc: A Dynamic Memory Management on Many-core Coprocessor for the Acceleration of Storage-intensive Bioinformatics Application.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2018
2017
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017
2016
Proceedings of the Seventh International Green and Sustainable Computing Conference, 2016
2014
Proceedings of the International Conference on Parallel Architectures and Compilation, 2014
2013
Proceedings of the 12th IEEE International Conference on Trust, 2013
Energy-Performance Modeling and Optimization of Parallel Computing in On-Chip Networks.
Proceedings of the 12th IEEE International Conference on Trust, 2013
SimICT: A fast and flexible framework for performance and power evaluation of large-scale architecture.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
2012
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012