Brandon H. Dwiel

According to our database, Brandon H. Dwiel authored at least 8 papers between 2011 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

Under 100-cycle thread migration latency in a single-ISA heterogeneous multi-core processor.

Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Brandon H. Dwiel, Rangeen Basu Roy Chowdhury, Vinesh Srinivasan, Steve Lipa, Eric Rotenberg, W. Rhett Davis, Paul D. Franzon

Proceedings of the 2015 IEEE Hot Chips 27 Symposium (HCS), 2015

2014

Design-effort alloy: Boosting a highly tuned primary core with untuned alternate cores.

Elliott Forbes, Niket Kumar Choudhary, Brandon H. Dwiel, Eric Rotenberg

Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

2013

Hetero² 3D integration: A scheme for optimizing efficiency/cost of Chip Multiprocessors.

Shivam Priyadarshi, Niket K. Choudhary, Brandon H. Dwiel, Ankita Upreti, Eric Rotenberg, William Rhett Davis, Paul D. Franzon

Proceedings of the International Symposium on Quality Electronic Design, 2013

Rationale for a 3D heterogeneous multi-core processor.

Eric Rotenberg, Brandon H. Dwiel, Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Rangeen Basu Roy Chowdhury, Nyunyi M. Tshibangu, Steve Lipa, W. Rhett Davis, Paul D. Franzon

Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

2012

FabScalar: Automating Superscalar Core Design.

Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay A. Shah, Hiran Mayukh, Jayneel Gandhi, Brandon H. Dwiel, Sandeep Navada, Hashem Hashemi Najaf-abadi, Eric Rotenberg

IEEE Micro, 2012

A physical design study of fabscalar-generated superscalar cores.

Niket K. Choudhary, Brandon H. Dwiel, Eric Rotenberg

Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

FPGA modeling of diverse superscalar processors.

Brandon H. Dwiel, Niket Kumar Choudhary, Eric Rotenberg

Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2012

2011

FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template.

Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay A. Shah, Hiran Mayukh, Jayneel Gandhi, Brandon H. Dwiel, Sandeep Navada, Hashem Hashemi Najaf-abadi, Eric Rotenberg

Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011