Brian Baldwin

According to our database1, Brian Baldwin authored at least 9 papers between 2009 and 2012.

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Timeline

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Bibliography

2012
Co-Z ECC scalar multiplications for hardware, software and hardware-software co-design on embedded systems.
J. Cryptographic Engineering, 2012

Yet Another SHA-3 Round 3 FPGA Results Paper.
IACR Cryptology ePrint Archive, 2012

2010
A Hardware Wrapper for the SHA-3 Hash Algorithms.
IACR Cryptology ePrint Archive, 2010

FPGA Implementations of the Round Two SHA-3 Candidates.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009
A Hardware Analysis of Twisted Edwards Curves for an Elliptic Curve Cryptosystem.
IACR Cryptology ePrint Archive, 2009

An FPGA Technologies Area Examination of the SHA-3 Hash Candidate Implementations.
IACR Cryptology ePrint Archive, 2009

FPGA Implementations of SHA-3 Candidates: CubeHash, Grøstl, Lane, Shabal and Spectral Hash.
IACR Cryptology ePrint Archive, 2009

The Certicom Challenges ECC2-X.
IACR Cryptology ePrint Archive, 2009

Reconfigurable Hardware Implementation of Arithmetic Modulo Minimal Redundancy Cyclotomic Primes for ECC.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009


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