Francesco Regazzoni
Orcid: 0000-0001-6385-0780Affiliations:
- University of Amsterdam, Amsterdam, The Netherlands
- University of Lugano, ALaRI, Lugano, Switzerland
According to our database1,
Francesco Regazzoni
authored at least 164 papers
between 2005 and 2024.
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Online presence:
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on zbmath.org
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on scopus.com
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on orcid.org
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on id.loc.gov
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on dl.acm.org
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Bibliography
2024
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
IEEE Des. Test, 2024
A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach.
CoRR, 2024
2023
Proc. IEEE, December, 2023
Treating a different kind of patient: curing security weaknesses in digital health systems of the future.
Proceedings of the 9th International Workshop on Advances in Sensors and Interfaces, 2023
H-Saber: An FPGA-Optimized Version for Designing Fast and Efficient Post-Quantum Cryptography Hardware Accelerators.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Application-specific FPGAs: cryptographic agility through customized reconfigurable architectures.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023
Data Under Siege: The Quest for the Optimal Convolutional Autoencoder in Side-Channel Attacks.
Proceedings of the International Joint Conference on Neural Networks, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the IEEE European Test Symposium, 2023
Running Longer To Slim Down: Post-Quantum Cryptography on Memory-Constrained Devices.
Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2023
Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security, 2023
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023
2022
IEEE Trans. Inf. Forensics Secur., 2022
IACR Cryptol. ePrint Arch., 2022
CoRR, 2022
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2022
Reducing the Cost of Machine Learning Differential Attacks Using Bit Selection and a Partial ML-Distinguisher.
Proceedings of the Foundations and Practice of Security - 15th International Symposium, 2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022
Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2022
Behavioral Synthesis for Hardware Security, 2022
2021
IEEE Trans. Dependable Secur. Comput., 2021
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021
J. Cryptogr. Eng., 2021
Reducing the Cost of Machine Learning Differential Attacks Using Bit Selection and aPartial ML-Distinguisher.
IACR Cryptol. ePrint Arch., 2021
Guest Editors' Introduction: Special Issue on Top Picks in Hardware and Embedded Security.
IEEE Des. Test, 2021
CoRR, 2021
A High Speed Integrated Quantum Random Number Generator with on-Chip Real-Time Randomness Extraction.
CoRR, 2021
Protecting artificial intelligence IPs: a survey of watermarking and fingerprinting for machine learning.
CAAI Trans. Intell. Technol., 2021
CAAI Trans. Intell. Technol., 2021
Proceedings of the 26th IEEE European Test Symposium, 2021
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
Post-Quantum Cryptography: Challenges and Opportunities for Robust and Secure HW Design.
Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021
EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Synthesis of Flexible Accelerators for Early Adoption of Ring-LWE Post-quantum Cryptography.
ACM Trans. Embed. Comput. Syst., 2020
IACR Cryptol. ePrint Arch., 2020
IACR Cryptol. ePrint Arch., 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020
Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
AHEC: End-to-end Compiler Framework for Privacy-preserving Machine Learning Acceleration.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
A secure, distributed and scalable infrastructure for remote generation and use of cryptographic keys.
Proceedings of the 2nd Conference on Blockchain Research & Applications for Innovative Networks and Services, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
The Curse of Class Imbalance and Conflicting Metrics with Machine Learning for Side-channel Evaluations.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
IACR Cryptol. ePrint Arch., 2019
IACR Cryptol. ePrint Arch., 2019
IACR Cryptol. ePrint Arch., 2019
Dagstuhl Reports, 2019
ACM Comput. Surv., 2019
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019
Elicitation of technical requirements in large research projects: the CERBERO approach.
Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, 2019
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
Proceedings of the 24th IEEE European Test Symposium, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of reconfigurable systems in unceRtain hybRid envirOnments: Invited paper: CERBERO teams from UniSS, UniCA, IBM Research, TASE, INSA-Rennes, UPM, USI, Abinsula, AmbieSense, TNO, S&T, CRF.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security, 2019
2018
IEEE Trans. Computers, 2018
IACR Cryptol. ePrint Arch., 2018
Rethinking Secure FPGAs: Towards a Cryptography-friendly Configurable Cell Architecture and its Automated Design Flow.
IACR Cryptol. ePrint Arch., 2018
Compact, Scalable, and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography.
IACR Cryptol. ePrint Arch., 2018
IEEE Embed. Syst. Lett., 2018
IEEE Embed. Syst. Lett., 2018
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018
Proceedings of the Fifth Workshop on Cryptography and Security in Computing Systems, 2018
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
Proceedings of the 2018 ACM SIGSAC Conference on Computer and Communications Security, 2018
Proceedings of the Progress in Cryptology - AFRICACRYPT 2018, 2018
2017
IACR Cryptol. ePrint Arch., 2017
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017
Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017
Proceedings of the 22nd IEEE European Test Symposium, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
IACR Cryptol. ePrint Arch., 2016
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016
Proceedings of the Selected Areas in Cryptography - SAC 2016, 2016
Proceedings of the International Symposium on Integrated Circuits, 2016
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016
Evaluating the Impact of Environmental Factors on Physically Unclonable Functions (Abstract Only).
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
2015
IACR Cryptol. ePrint Arch., 2015
IACR Cryptol. ePrint Arch., 2015
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Simulation and analysis of negative-bias temperature instability aging on power analysis attacks.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015
Proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2015
Proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2015
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015
Proceedings of the Advances in Cryptology - ASIACRYPT 2015 - 21st International Conference on the Theory and Application of Cryptology and Information Security, Auckland, New Zealand, November 29, 2015
2014
A Combined Design-Time/Test-Time Study of the Vulnerability of Sub-Threshold Devices to Low Voltage Fault Attacks.
IEEE Trans. Emerg. Top. Comput., 2014
IACR Cryptol. ePrint Arch., 2014
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
Proceedings of the 9th Workshop on Embedded Systems Security, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
Proceedings of the Secure Smart Embedded Devices, Platforms and Applications, 2014
2013
Proceedings of the Fast Software Encryption - 20th International Workshop, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2013, 2013
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2013, 2013
2012
Interaction Between Fault Attack Countermeasures and the Resistance Against Power Analysis Attacks.
Proceedings of the Fault Analysis in Cryptography, 2012
A Fast ULV Logic Synthesis Flow in Many-V<sub>t</sub> CMOS Processes for Minimum Energy Under Timing Constraints.
IEEE Trans. Circuits Syst. II Express Briefs, 2012
Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices.
IACR Cryptol. ePrint Arch., 2012
LEXCOMM: A low energy, secure and flexible communication protocol for a heterogenous body sensor network.
Proceedings of 2012 IEEE-EMBS International Conference on Biomedical and Health Informatics, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices.
Proceedings of the Progress in Cryptology - AFRICACRYPT 2012, 2012
2011
Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65 nm AES coprocessor for passive RFID tags.
J. Cryptogr. Eng., 2011
Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-threshold Devices through an Example of a 65nm AES Implementation.
Proceedings of the RFID. Security and Privacy - 7th International Workshop, 2011
Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library.
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 48th Design Automation Conference, 2011
Fresh Re-keying II: Securing Multiple Parties against Side-Channel and Fault Attacks.
Proceedings of the Smart Card Research and Advanced Applications, 2011
Proceedings of the Smart Card Research and Advanced Applications, 2011
2010
Hardware Trojans for Inducing or Amplifying Side-Channel Leakage of Cryptographic Software.
Proceedings of the Trusted Systems - Second International Conference, 2010
A reconfigurable multiprocessor architecture for a reliable face recognition implementation.
Proceedings of the Design, Automation and Test in Europe, 2010
Countermeasures against fault attacks on software implemented AES: effectiveness and cost.
Proceedings of the 5th Workshop on Embedded Systems Security, 2010
Fresh Re-keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices.
Proceedings of the Progress in Cryptology, 2010
2009
Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology.
Trans. Comput. Sci., 2009
Proceedings of the Cryptographic Hardware and Embedded Systems, 2009
2008
A 640 Mbit/S 32-Bit Pipelined Implementation of the AES Algorithm.
Proceedings of the SECRYPT 2008, 2008
Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008
2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies.
Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007
Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
Hardware/software partitioning of operating systems: a behavioral synthesis approach.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006
2005
Proceedings of the Forum on specification and Design Languages, 2005