Nele Mentens

IACR Cryptol. ePrint Arch., 2023

Quantization-aware Neural Architectural Search for Intrusion Detection.

[BibT_eX]

[DOI]

CoRR, 2023

ALBUS: a Probabilistic Monitoring Algorithm to Counter Burst-Flood Attacks.

[BibT_eX]

[DOI]

Proceedings of the 42nd International Symposium on Reliable Distributed Systems, 2023

Evaluation of Secure Circuit Styles Using Unipolar Logic Gates.

[BibT_eX]

[DOI]

Jelle Biesmans

Kris Myny

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

Application-specific FPGAs: cryptographic agility through customized reconfigurable architectures.

[BibT_eX]

[DOI]

Jelle Biesmans

Francesco Regazzoni

Christelle Charpin-Nicolle

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

Preface.

[BibT_eX]

[DOI]

Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Evolving Non-cryptographic Hash Functions Using Genetic Programming for High-speed Lookups in Network Security Applications.

[BibT_eX]

[DOI]

Proceedings of the Applications of Evolutionary Computation - 26th European Conference, 2023

A Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors.

[BibT_eX]

[DOI]

Proceedings of the IEEE European Test Symposium, 2023

NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips.

[BibT_eX]

[DOI]

Alejandro Hernán Gloriani

Bernabé Linares-Barranco

Marcel D. van de Burgwal

Geert Van der Plas

Elisa Vianello

Pavel Zaykov

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Yes we CAN!: Towards bringing security to legacy-restricted Controller Area Networks. A review.

[BibT_eX]

[DOI]

Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

Preface ASAP 2023.

[BibT_eX]

[DOI]

João M. P. Cardoso

Alexandra Jimborean

José Gabriel F. Coutinho

Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

2022

Intelligent Security: Is "AI for Cybersecurity" a Blessing or a Curse (Dagstuhl Seminar 22412).

[BibT_eX]

[DOI]

Ahmad-Reza Sadeghi

Dagstuhl Reports, October, 2022

Hardware-oriented optimization of Bloom filter algorithms and architectures for ultra-high-speed lookups in network applications.

[BibT_eX]

[DOI]

Microprocess. Microsystems, September, 2022

Introduction to the Special Section on FPL 2020.

[BibT_eX]

[DOI]

Leonel Sousa

Pedro Trancoso

ACM Trans. Reconfigurable Technol. Syst., 2022

In-depth energy analysis of security algorithms and protocols for the Internet of Things.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., 2022

Maximizing the Potential of Custom RISC-V Vector Extensions for Speeding up SHA-3 Hash Functions.

[BibT_eX]

[DOI]

Huimin Li

IACR Cryptol. ePrint Arch., 2022

An Analysis of the Hardware-Friendliness of AMQ Data Structures for Network Security.

[BibT_eX]

[DOI]

Arish Sateesan

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2022

FOCUS: Frequency Based Detection of Covert Ultrasonic Signals.

[BibT_eX]

[DOI]

Proceedings of the ICT Systems Security and Privacy Protection, 2022

Feature dimensionality in CNN acceleration for high-throughput network intrusion detection.

[BibT_eX]

[DOI]

Toon Goedemé

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

Energy and side-channel security evaluation of near-threshold cryptographic circuits in 28nm FD-SOI technology.

[BibT_eX]

[DOI]

Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022

2021

A Scalable SIMD RISC-V based Processor with Customized Vector Extensions for CRYSTALS-Kyber.

[BibT_eX]

[DOI]

Huimin Li

IACR Cryptol. ePrint Arch., 2021

Communication and Security Trade-Offs for Battery-Powered Devices: A Case Study on Wearable Medical Sensor Systems.

[BibT_eX]

[DOI]

IEEE Access, 2021

Machine Learning for Misuse-Based Network Intrusion Detection: Overview, Unified Evaluation and Feature Choice Comparison Framework.

[BibT_eX]

[DOI]

Toon Goedemé

IEEE Access, 2021

Evaluating the ROCKY Countermeasure for Side-Channel Leakage.

[BibT_eX]

[DOI]

Konstantina Miteloudi

Lukasz Chmielewski

Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

Low-Rate Overuse Flow Tracer (LOFT): An Efficient and Scalable Algorithm for Detecting Overuse Flows.

[BibT_eX]

[DOI]

Simon Scherrer

Che-Yu Wu

Yu-Hsi Chiang

Benjamin Rothenberger

Proceedings of the 40th International Symposium on Reliable Distributed Systems, 2021

SoK - Network Intrusion Detection on FPGA.

[BibT_eX]

[DOI]

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2021

RESERVE: Remote Attestation of Intermittent IoT devices.

[BibT_eX]

[DOI]

Proceedings of the SenSys '21: The 19th ACM Conference on Embedded Networked Sensor Systems, Coimbra, Portugal, November 15, 2021

ROCKY: Rotation Countermeasure for the Protection of Keys and Other Sensitive Data.

[BibT_eX]

[DOI]

Konstantina Miteloudi

Joan Daemen

Hector Gerardo Muñoz Hernandez

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2021

Speed Records in Network Flow Measurement on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

AITIA: Embedded AI Techniques for Industrial Applications.

[BibT_eX]

[DOI]

Marcelo Brandalero

Mitko Veleski

Jurgen Vandendriessche

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Trusted Configuration in Cloud FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

Novel Non-cryptographic Hash Functions for Networking and Security Applications on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

Invited: Security Beyond Bulk Silicon: Opportunities and Challenges of Emerging Devices.

[BibT_eX]

[DOI]

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Towards Real-Time Deep Learning-Based Network Intrusion Detection on FPGA.

[BibT_eX]

[DOI]

Toon Goedemé

Proceedings of the Applied Cryptography and Network Security Workshops, 2021

2020

Lightweight Ciphers and Their Side-Channel Resilience.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2020

Side-channel countermeasures utilizing dynamic logic reconfiguration: Protecting AES/Rijndael and Serpent encryption in hardware.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2020

PROOFS 2018 Editorial.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., 2020

On the feasibility of using evolvable hardware for hardware Trojan detection and prevention.

[BibT_eX]

[DOI]

Mansoureh Labafniya

Shahram Etemadi Borujeni

Appl. Soft Comput., 2020

SHeFU: Secure Hardware-Enabled Protocol for Firmware Updates.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Novel Bloom filter algorithms and architectures for ultra-high-speed network security applications.

[BibT_eX]

[DOI]

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

Breaking a fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves.

[BibT_eX]

[DOI]

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

INVITED: AI Utopia or Dystopia - On Securing AI Platforms.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

AITIA: Embedded AI Techniques for Embedded Industrial Applications.

[BibT_eX]

[DOI]

Marcelo Brandalero

Muhammad Ali

Hector Gerardo Muñoz Hernandez

Proceedings of the 2020 International Conference on Omni-layer Intelligent Systems, 2020

Evolvable Hardware Architectures on FPGA for Side-Channel Security.

[BibT_eX]

[DOI]

Mansoureh Labafniya

Shahram Etemadi Borujeni

Proceedings of the Applied Cryptography and Network Security Workshops, 2020

2019

Security on Plastics: Fake or Real?

[BibT_eX]

[DOI]

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019

Balancing elliptic curve coprocessors from bottom to top.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2019

SHeLA: Scalable Heterogeneous Layered Attestation.

[BibT_eX]

[DOI]

IEEE Internet Things J., 2019

A Novel FPGA Architecture and Protocol for the Self-attestation of Configurable Hardware.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2019

Efficient Utilization of DSPs and BRAMs Revisited: New AES-GCM Recipes on FPGAs.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2019

Communication and security trade-offs for wearable medical sensor systems in hospitals: work-in-progress.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Embedded Software Companion, 2019

Dynamic Logic Reconfiguration Based Side-Channel Protection of AES and Serpent.

[BibT_eX]

[DOI]

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

SACHa: Self-Attestation of Configurable Hardware.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

In Hardware We Trust: Gains and Pains of Hardware-assisted Security.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

ES-TRNG: A High-throughput, Low-area True Random Number Generator based on Edge Sampling.

[BibT_eX]

[DOI]

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

High-speed Side-channel-protected Encryption and Authentication in Hardware.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2018

Rethinking Secure FPGAs: Towards a Cryptography-friendly Configurable Cell Architecture and its Automated Design Flow.

[BibT_eX]

[DOI]

Edoardo Charbon

Francesco Regazzoni

IACR Cryptol. ePrint Arch., 2018

Finding short and implementation-friendly addition chains with evolutionary algorithms.

[BibT_eX]

[DOI]

Carlos A. Coello Coello

Domagoj Jakobovic

J. Heuristics, 2018

A Systematic Performance Comparison of Ultra Low-Power AES S-Boxes.

[BibT_eX]

[DOI]

Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018

Combining analog and digital electronics in a hands-on introductory course.

[BibT_eX]

[DOI]

Ronald Thoelen

Proceedings of the 12th European Workshop on Microelectronics Education, 2018

Design of a Fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves.

[BibT_eX]

[DOI]

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Storage and computation optimization of public-key schemes on embedded devices.

[BibT_eX]

[DOI]

Jori Winderickx

An Braeken

Proceedings of the 2018 4th International Conference on Cloud Computing Technologies and Applications, 2018

Digital signatures and signcryption schemes on embedded devices: a trade-off between computation and storage.

[BibT_eX]

[DOI]

Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards.

[BibT_eX]

[DOI]

Proceedings of the 2018 Workshop on Attacks and Solutions in Hardware Security, 2018

HeComm: End-to-end secured communication in a heterogeneous IoT environment via fog computing.

[BibT_eX]

[DOI]

Jori Winderickx

Dave Singelée

Proceedings of the 15th IEEE Annual Consumer Communications & Networking Conference, 2018

2017

Side-channel Analysis of Lightweight Ciphers: Does Lightweight Equal Easy?

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2017

Hiding side-channel leakage through hardware randomization: A comprehensive overview.

[BibT_eX]

[DOI]

Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

Maximizing the throughput of threshold-protected AES-GCM implementations on FPGA.

[BibT_eX]

[DOI]

Oscar Reparaz

Proceedings of the IEEE 2nd International Verification and Security Workshop, 2017

Side-channel analysis and machine learning: A practical perspective.

[BibT_eX]

[DOI]

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

The Monte Carlo PUF.

[BibT_eX]

[DOI]

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Area-optimized montgomery multiplication on IGLOO 2 FPGAs.

[BibT_eX]

[DOI]

Pedro Maat C. Massolino

Ricardo Chaves

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Design of S-boxes Defined with Cellular Automata Rules.

[BibT_eX]

[DOI]

Proceedings of the Computing Frontiers Conference, 2017

Do we need a holistic approach for the design of secure IoT systems?

[BibT_eX]

[DOI]

Proceedings of the Computing Frontiers Conference, 2017

On-chip jitter measurement for true random number generators.

[BibT_eX]

[DOI]

Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016

Guest Editorial.

[BibT_eX]

[DOI]

IET Inf. Secur., 2016

Canary Numbers: Design for Light-weight Online Testability of True Random Number Generators.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2016

Low Power Montgomery Modular Multiplication on Reconfigurable Systems.

[BibT_eX]

[DOI]

Pedro Maat C. Massolino

Ricardo Chaves

IACR Cryptol. ePrint Arch., 2016

A Search Strategy to Optimize the Affine Variant Properties of S-Boxes.

[BibT_eX]

[DOI]

Bohan Yang

Proceedings of the Arithmetic of Finite Fields - 6th International Workshop, 2016

On the Construction of Hardware-Friendly 4\times 4 and 5\times 5 S-Boxes.

[BibT_eX]

[DOI]

Proceedings of the Selected Areas in Cryptography - SAC 2016, 2016

Evolving Cryptographic Pseudorandom Number Generators.

[BibT_eX]

[DOI]

Proceedings of the Parallel Problem Solving from Nature - PPSN XIV, 2016

Exploring the use of shift register lookup tables for Keccak implementations on Xilinx FPGAs.

[BibT_eX]

[DOI]

Jori Winderickx

Joan Daemen

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Evolutionary Algorithms for Finding Short Addition Chains: Going the Distance.

[BibT_eX]

[DOI]

Carlos A. Coello Coello

Domagoj Jakobovic

Proceedings of the Evolutionary Computation in Combinatorial Optimization, 2016

TOTAL: TRNG on-the-fly testing for attack detection using Lightweight hardware.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

PRNGs for Masking Applications and Their Mapping to Evolvable Hardware.

[BibT_eX]

[DOI]

Proceedings of the Smart Card Research and Advanced Applications, 2016

Extreme Pipelining Towards the Best Area-Performance Trade-Off in Hardware.

[BibT_eX]

[DOI]

Proceedings of the Progress in Cryptology - AFRICACRYPT 2016, 2016

A Fast and Compact FPGA Implementation of Elliptic Curve Cryptography Using Lambda Coordinates.

[BibT_eX]

[DOI]

Proceedings of the Progress in Cryptology - AFRICACRYPT 2016, 2016

2015

Secure, Remote, Dynamic Reconfiguration of FPGAs.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2015

Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., 2015

On-the-fly tests for non-ideal true random number generators.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Challenges in designing trustworthy cryptographic co-processors.

[BibT_eX]

[DOI]

Apostolos P. Fournaris

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Embedded HW/SW platform for on-the-fly testing of true random number generators.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Study on impact of adding security in a 6LoWPAN based network.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE Conference on Communications and Network Security, 2015

DynamIA: Dynamic Hardware Reconfiguration in Industrial Applications.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014

High-speed Polynomial Multiplication Architecture for Ring-LWE and SHE Cryptosystems.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2014

S-box pipelining using genetic algorithms for high-throughput AES implementations: How fast can we go?

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2014

Compact Ring-LWE Cryptoprocessor.

[BibT_eX]

[DOI]

Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2014, 2014

An Elliptic Curve Cryptographic Processor Using Edwards Curves and the Number Theoretic Transform.

[BibT_eX]

[DOI]

Selçuk Baktir

Proceedings of the Cryptography and Information Security in the Balkans, 2014

2013

Compact Hardware Implementation of Ring-LWE Cryptosystems.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2013

Dietary Recommendations for Lightweight Block Ciphers: Power, Energy and Area Analysis of Recently Developed Architectures.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2013

A single-chip solution for the secure remote configuration of FPGAs using bitstream compression.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Remote FPGA design through eDiViDe - European Digital Virtual Design Lab.

[BibT_eX]

[DOI]

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012

Design space exploration for automatically generated cryptographic hardware using functional languages.

[BibT_eX]

[DOI]

Davy Wolfs

Kris Aerts

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011

Secure remote reconfiguration of an FPGA-based embedded system.

[BibT_eX]

[DOI]

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

2010

Side-channel evaluation of FPGA implementations of binary Edwards curves.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International Conference on Electronics, 2010

Secure remote reconfiguration of FPGAs.

[BibT_eX]

[DOI]

Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010

A compact FPGA-based architecture for elliptic curve cryptography over prime fields.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

2009

Breaking ECC2K-130.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2009

The Certicom Challenges ECC2-X.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2009

Secure FPGA technologies and techniques.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008

Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration.

[BibT_eX]

[DOI]

Benedikt Gierlichs

Proceedings of the Cryptographic Hardware and Embedded Systems, 2008

2007

A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007

Public-Key Cryptography for RFID-Tags.

[BibT_eX]

[DOI]

Proceedings of the Fifth Annual IEEE International Conference on Pervasive Computing and Communications, 2007

Public-Key Cryptography on the Top of a Needle.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Efficient pipelining for modular multiplication architectures in prime fields.

[BibT_eX]

[DOI]

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

2006

An Elliptic Curve Processor Suitable For RFID-Tags.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2006

Flexible hardware architectures for curve-based cryptography.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Fpga-Oriented Secure Data Path Design: Implementation of a Public Key Coprocessor.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Low-Cost Elliptic Curve Cryptography for Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the Security and Privacy in Ad-Hoc and Sensor Networks, 2006

Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

Time-Memory Trade-Off Attack on FPGA Platforms: UNIX Password Cracking.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

2005

Side-Channel Issues for Designing Secure Hardware Implementations.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-Box.

[BibT_eX]

[DOI]

Proceedings of the Topics in Cryptology, 2005

Side-channel aware design: Algorithms and Architectures for Elliptic Curve Cryptography over GF(2<sup>n</sup>).

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

2004

An FPGA Implementation of a Montgomery Multiplier Over GF(2^m).

[BibT_eX]

[DOI]

Comput. Artif. Intell., 2004

An FPGA implementation of an elliptic curve processor GF(2<sup>m</sup>).

[BibT_eX]

[DOI]